| /external/arm-neon-tests/ |
| D | ref_dspfns.c | 66 Carry = init_Carry; in test_16_fn_32()
69 func_name, svar32_a, svar16_a, Overflow, Carry); in test_16_fn_32()
73 Carry = init_Carry; in test_16_fn_32()
76 func_name, svar32_a, svar16_a, Overflow, Carry); in test_16_fn_32()
80 Carry = init_Carry; in test_16_fn_32()
83 func_name, svar32_a, svar16_a, Overflow, Carry); in test_16_fn_32()
87 Carry = init_Carry; in test_16_fn_32()
90 func_name, svar32_a, svar16_a, Overflow, Carry); in test_16_fn_32()
94 Carry = init_Carry; in test_16_fn_32()
97 func_name, svar32_a, svar16_a, Overflow, Carry); in test_16_fn_32()
[all …]
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| D | ref-rvct-all.txt | 8044 DSP FNS (non-NEON/ITU) intrinsics with input Overflow=0 and input Carry=0
8045 Checking saturate with input Overflow=0 and input Carry=0
8124 Checking L_add_c with input Overflow=0 and input Carry=0
8142 Checking L_macNs with input Overflow=0 and input Carry=0
8147 Checking L_msuNs with input Overflow=0 and input Carry=0
8242 DSP FNS (non-NEON/ITU) intrinsics with input Overflow=0 and input Carry=1
8243 Checking saturate with input Overflow=0 and input Carry=1
8322 Checking L_add_c with input Overflow=0 and input Carry=1
8340 Checking L_macNs with input Overflow=0 and input Carry=1
8345 Checking L_msuNs with input Overflow=0 and input Carry=1
[all …]
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| /external/vulkan-validation-layers/libs/glm/detail/ |
| D | func_integer.inl | 50 uint & Carry argument
55 …Carry = (Value64 % (static_cast<uint64>(1) << static_cast<uint64>(32))) > 1 ? static_cast<uint32>(…
64 uvec2 & Carry argument
68 uaddCarry(x[0], y[0], Carry[0]),
69 uaddCarry(x[1], y[1], Carry[1]));
77 uvec3 & Carry argument
81 uaddCarry(x[0], y[0], Carry[0]),
82 uaddCarry(x[1], y[1], Carry[1]),
83 uaddCarry(x[2], y[2], Carry[2]));
91 uvec4 & Carry argument
[all …]
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| /external/llvm/lib/Support/ |
| D | ScaledNumber.cpp | 293 bool Carry = doesRoundUp(Str[Truncate]); in toString() local
294 if (!Carry) in toString()
308 Carry = false; in toString()
313 return stripTrailingZeros(std::string(Carry, '1') + Str.substr(0, Truncate)); in toString()
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| D | APInt.cpp | 758 uint64_t Carry = 0; in lshrNear() local
761 Dst[I] = (Tmp >> Shift) | Carry; in lshrNear()
762 Carry = Tmp << (64 - Shift); in lshrNear()
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| /external/llvm/lib/Target/Mips/ |
| D | Mips16ISelDAGToDAG.cpp | 220 SDNode *Carry = CurDAG->getMachineNode(Sltu_op, DL, VT, Ops); in trySelect() local
223 CurDAG->getMachineNode(Addu_op, DL, VT, SDValue(Carry, 0), RHS); in trySelect()
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| D | MipsSEISelDAGToDAG.cpp | 259 SDNode *Carry = CurDAG->getMachineNode(SLTuOp, DL, VT, Ops); in selectAddESubE() local
265 Carry = CurDAG->getMachineNode(Mips::SUBREG_TO_REG, DL, VT, in selectAddESubE()
267 SDValue(Carry, 0), in selectAddESubE()
274 SDNode *AddCarry = Carry; in selectAddESubE()
277 AddCarry = CurDAG->getMachineNode(ADDuOp, DL, VT, SDValue(Carry, 0), RHS); in selectAddESubE()
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| D | MicroMips64r6InstrInfo.td | 465 // Carry pattern
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| /external/swiftshader/third_party/LLVM/lib/Target/Mips/ |
| D | MipsISelDAGToDAG.cpp | 232 SDNode *Carry = CurDAG->getMachineNode(Mips::SLTu, dl, VT, Ops, 2); in Select() local
234 SDValue(Carry,0), RHS); in Select()
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| /external/llvm/lib/Transforms/Utils/ |
| D | IntegerDivision.cpp | 317 Value *Carry = Builder.CreateAnd(Tmp10, One); in generateUnsignedDivisionCode() local
346 Carry_1->addIncoming(Carry, DoWhile); in generateUnsignedDivisionCode()
358 Carry_2->addIncoming(Carry, DoWhile); in generateUnsignedDivisionCode()
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| /external/llvm/lib/Target/Hexagon/ |
| D | BitTracker.cpp | 440 bool Carry = false; in eADD() local
447 unsigned S = bool(V1) + bool(V2) + Carry; in eADD()
449 Carry = (S > 1); in eADD()
456 if (V1.is(Carry)) in eADD()
458 else if (V2.is(Carry)) in eADD()
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| /external/syslinux/dosutil/ |
| D | eltorito.asm | 814 ; Carry is not cleared in buggy Dell BIOSes,
1038 ; Carry is not cleared in buggy Dell BIOSes,
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| /external/swiftshader/third_party/LLVM/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 733 SDValue Carry = DAG.getNode(Opcode, dl, DAG.getVTList(MVT::i32, MVT::i32), in ExpandADDSUB() local
735 SDValue Lo(Carry.getNode(), 1); in ExpandADDSUB()
738 LHSH, RHSH, Carry); in ExpandADDSUB()
1344 SDValue Carry = DAG.getConstant(0, VT); in PerformDAGCombine() local
1347 SDValue Ops [] = { Carry, Result }; in PerformDAGCombine()
1359 SDValue Carry = DAG.getConstant(0, VT); in PerformDAGCombine() local
1361 SDValue Ops [] = { Carry, Result }; in PerformDAGCombine()
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| /external/llvm/lib/Target/XCore/ |
| D | XCoreISelLowering.cpp | 750 SDValue Carry(Lo.getNode(), 1); in ExpandADDSUB() local
753 LHSH, RHSH, Carry); in ExpandADDSUB()
1662 SDValue Carry = DAG.getConstant(0, dl, VT); in PerformDAGCombine() local
1665 SDValue Ops[] = { Result, Carry }; in PerformDAGCombine()
1677 SDValue Carry = DAG.getConstant(0, dl, VT); in PerformDAGCombine() local
1679 SDValue Ops[] = { Result, Carry }; in PerformDAGCombine()
1750 SDValue Carry(Result.getNode(), 1); in PerformDAGCombine() local
1751 SDValue Ops[] = { Carry, Result }; in PerformDAGCombine()
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| /external/swiftshader/third_party/LLVM/lib/Target/CellSPU/ |
| D | SPUNodes.td | 70 // Op3: Carry-generate shuffle mask
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| /external/llvm/lib/Target/X86/ |
| D | X86ScheduleSLM.td | 209 // Carry-less multiplication instructions.
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| D | X86SchedSandyBridge.td | 229 // Carry-less multiplication instructions.
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| D | X86ScheduleBtVer2.td | 323 // Carry-less multiplication instructions.
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| /external/llvm/lib/Target/Lanai/ |
| D | LanaiInstrFormats.td | 62 // (Carry), according to the result. If the flags are updated, they are
137 // (Zero), `N' (Negative), `V' (oVerflow), and `C' (Carry), according to
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| D | LanaiISelLowering.cpp | 961 SDValue Carry = Op.getOperand(2); in LowerSETCCE() local
967 SDValue Flag = DAG.getNode(LanaiISD::SUBBF, DL, MVT::Glue, LHS, RHS, Carry); in LowerSETCCE()
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| /external/llvm/lib/Target/PowerPC/ |
| D | README_P9.txt | 131 - Vector Multiply-by-10 (& Write Carry) Unsigned Quadword:
137 - Vector Multiply-by-10 Extended (& Write Carry) Unsigned Quadword:
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| D | PPCRegisterInfo.td | 216 // Carry bit. In the architecture this is really bit 0 of the XER register
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| /external/swiftshader/third_party/LLVM/lib/Target/PowerPC/ |
| D | PPCRegisterInfo.td | 261 // Carry bit. In the architecture this is really bit 0 of the XER register
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| /external/llvm/lib/Target/AMDGPU/ |
| D | AMDGPUISelDAGToDAG.cpp | 605 SDValue Carry(AddLo, 1); in SelectADD_SUB_I64() local
608 SDValue(Hi0, 0), SDValue(Hi1, 0), Carry); in SelectADD_SUB_I64()
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| /external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
| D | SparcInstrInfo.td | 153 def ICC_CC : ICC_VAL<13>; // Carry Clear/Great or Equal Unsigned
154 def ICC_CS : ICC_VAL< 5>; // Carry Set/Less Unsigned
|