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Searched refs:SimpleTy (Results 1 – 25 of 83) sorted by relevance

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/external/llvm/include/llvm/CodeGen/
DMachineValueType.h179 SimpleValueType SimpleTy; variable
181 LLVM_CONSTEXPR MVT() : SimpleTy(INVALID_SIMPLE_VALUE_TYPE) {} in MVT()
182 LLVM_CONSTEXPR MVT(SimpleValueType SVT) : SimpleTy(SVT) { } in MVT()
184 bool operator>(const MVT& S) const { return SimpleTy > S.SimpleTy; }
185 bool operator<(const MVT& S) const { return SimpleTy < S.SimpleTy; }
186 bool operator==(const MVT& S) const { return SimpleTy == S.SimpleTy; }
187 bool operator!=(const MVT& S) const { return SimpleTy != S.SimpleTy; }
188 bool operator>=(const MVT& S) const { return SimpleTy >= S.SimpleTy; }
189 bool operator<=(const MVT& S) const { return SimpleTy <= S.SimpleTy; }
193 return (SimpleTy >= MVT::FIRST_VALUETYPE && in isValid()
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DValueTypes.h45 if (V.SimpleTy != VT.V.SimpleTy)
47 if (V.SimpleTy < 0)
63 if (M.SimpleTy >= 0) in getIntegerVT()
72 if (M.SimpleTy >= 0) in getVectorVT()
87 assert(VecTy.SimpleTy >= 0 && in changeVectorElementTypeToInteger()
108 return V.SimpleTy >= 0; in isSimple()
348 return V.SimpleTy; in getRawBits()
357 if (L.V.SimpleTy == R.V.SimpleTy) in operator()
360 return L.V.SimpleTy < R.V.SimpleTy; in operator()
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DValueTypes.h132 SimpleValueType SimpleTy; variable
134 MVT() : SimpleTy((SimpleValueType)(INVALID_SIMPLE_VALUE_TYPE)) {} in MVT()
135 MVT(SimpleValueType SVT) : SimpleTy(SVT) { } in MVT()
137 bool operator>(const MVT& S) const { return SimpleTy > S.SimpleTy; }
138 bool operator<(const MVT& S) const { return SimpleTy < S.SimpleTy; }
139 bool operator==(const MVT& S) const { return SimpleTy == S.SimpleTy; }
140 bool operator!=(const MVT& S) const { return SimpleTy != S.SimpleTy; }
141 bool operator>=(const MVT& S) const { return SimpleTy >= S.SimpleTy; }
142 bool operator<=(const MVT& S) const { return SimpleTy <= S.SimpleTy; }
146 return ((SimpleTy >= MVT::f32 && SimpleTy <= MVT::ppcf128) || in isFloatingPoint()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86GenFastISel.inc27 switch (RetVT.SimpleTy) {
35 if (RetVT.SimpleTy != MVT::i64)
41 switch (VT.SimpleTy) {
51 if (RetVT.SimpleTy != MVT::f32)
81 switch (RetVT.SimpleTy) {
89 if (RetVT.SimpleTy != MVT::i32)
115 switch (RetVT.SimpleTy) {
135 switch (RetVT.SimpleTy) {
143 switch (VT.SimpleTy) {
156 if (RetVT.SimpleTy != MVT::isVoid)
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DX86ISelDAGToDAG.cpp1387 switch (NVT.getSimpleVT().SimpleTy) { in SelectAtomicLoadAdd()
1599 switch (NVT.getSimpleVT().SimpleTy) { in SelectAtomicLoadArith()
1803 switch (NVT.getSimpleVT().SimpleTy) { in Select()
1839 switch (NVT.getSimpleVT().SimpleTy) { in Select()
1867 switch (NVT.getSimpleVT().SimpleTy) { in Select()
1875 switch (NVT.getSimpleVT().SimpleTy) { in Select()
1885 switch (NVT.getSimpleVT().SimpleTy) { in Select()
1967 switch (NVT.getSimpleVT().SimpleTy) { in Select()
1975 switch (NVT.getSimpleVT().SimpleTy) { in Select()
1986 switch (NVT.getSimpleVT().SimpleTy) { in Select()
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DX86FastISel.cpp181 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitLoad()
238 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitStore()
278 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitStore()
824 switch (VT.getSimpleVT().SimpleTy) { in X86ChooseCmpOpcode()
841 switch (VT.getSimpleVT().SimpleTy) { in X86ChooseCmpImmediateOpcode()
1083 switch (SourceVT.SimpleTy) { in X86SelectBranch()
1977 switch (VT.SimpleTy) { in TargetMaterializeConstant()
2099 switch (VT.SimpleTy) { in TargetMaterializeFloatZero()
/external/swiftshader/third_party/LLVM/include/llvm/Target/
DTargetLowering.h204 TargetRegisterClass *RC = RegClassForVT[VT.getSimpleVT().SimpleTy]; in getRegClassFor()
216 const TargetRegisterClass *RC = RepRegClassForVT[VT.getSimpleVT().SimpleTy]; in getRepRegClassFor()
224 return RepRegClassCostForVT[VT.getSimpleVT().SimpleTy]; in getRepRegClassCostFor()
232 (unsigned)VT.getSimpleVT().SimpleTy < array_lengthof(RegClassForVT)); in isTypeLegal()
233 return VT.isSimple() && RegClassForVT[VT.getSimpleVT().SimpleTy] != 0; in isTypeLegal()
247 return (LegalizeTypeAction)ValueTypeActions[VT.SimpleTy]; in getTypeAction()
251 unsigned I = VT.getSimpleVT().SimpleTy; in setTypeAction()
373 unsigned I = (unsigned) VT.getSimpleVT().SimpleTy; in getOperationAction()
401 return (LegalizeAction)LoadExtActions[VT.getSimpleVT().SimpleTy][ExtType]; in getLoadExtAction()
418 return (LegalizeAction)TruncStoreActions[ValVT.getSimpleVT().SimpleTy] in getTruncStoreAction()
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/external/llvm/include/llvm/Target/
DTargetLowering.h431 const TargetRegisterClass *RC = RegClassForVT[VT.SimpleTy]; in getRegClassFor()
444 const TargetRegisterClass *RC = RepRegClassForVT[VT.SimpleTy]; in getRepRegClassFor()
451 return RepRegClassCostForVT[VT.SimpleTy]; in getRepRegClassCostFor()
459 (unsigned)VT.getSimpleVT().SimpleTy < array_lengthof(RegClassForVT)); in isTypeLegal()
460 return VT.isSimple() && RegClassForVT[VT.getSimpleVT().SimpleTy] != nullptr; in isTypeLegal()
475 return ValueTypeActions[VT.SimpleTy]; in getTypeAction()
479 ValueTypeActions[VT.SimpleTy] = Action; in setTypeAction()
603 return OpActions[(unsigned)VT.getSimpleVT().SimpleTy][Op]; in getOperationAction()
660 unsigned ValI = (unsigned) ValVT.getSimpleVT().SimpleTy; in getLoadExtAction()
661 unsigned MemI = (unsigned) MemVT.getSimpleVT().SimpleTy; in getLoadExtAction()
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/external/llvm/lib/Target/AArch64/
DAArch64CallingConvention.h90 if (LocVT.SimpleTy == MVT::i64) in CC_AArch64_Custom_Block()
92 else if (LocVT.SimpleTy == MVT::f16) in CC_AArch64_Custom_Block()
94 else if (LocVT.SimpleTy == MVT::f32 || LocVT.is32BitVector()) in CC_AArch64_Custom_Block()
96 else if (LocVT.SimpleTy == MVT::f64 || LocVT.is64BitVector()) in CC_AArch64_Custom_Block()
98 else if (LocVT.SimpleTy == MVT::f128 || LocVT.is128BitVector()) in CC_AArch64_Custom_Block()
DAArch64FastISel.cpp286 switch (VT.SimpleTy) { in getImplicitScaleFactor()
1086 switch (RetVT.SimpleTy) { in emitAddSub()
1105 RetVT.SimpleTy = std::max(RetVT.SimpleTy, MVT::i32); in emitAddSub()
1405 switch (VT.SimpleTy) { in emitCmp()
1595 MVT VT = std::max(MVT::i32, RetVT.SimpleTy); in emitLogicalOp()
1617 switch (RetVT.SimpleTy) { in emitLogicalOp_ri()
1668 switch (RetVT.SimpleTy) { in emitLogicalOp_rs()
1775 switch (VT.SimpleTy) { in emitLoad()
2041 switch (VT.SimpleTy) { in emitStore()
2586 switch (VT.SimpleTy) { in selectSelect()
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/external/llvm/lib/Target/NVPTX/
DNVPTXISelDAGToDAG.cpp739 MVT::SimpleValueType TargetVT = LD->getSimpleValueType(0).SimpleTy; in tryLoad()
986 switch (EltVT.getSimpleVT().SimpleTy) { in tryLoadVector()
1010 switch (EltVT.getSimpleVT().SimpleTy) { in tryLoadVector()
1039 switch (EltVT.getSimpleVT().SimpleTy) { in tryLoadVector()
1063 switch (EltVT.getSimpleVT().SimpleTy) { in tryLoadVector()
1093 switch (EltVT.getSimpleVT().SimpleTy) { in tryLoadVector()
1117 switch (EltVT.getSimpleVT().SimpleTy) { in tryLoadVector()
1140 switch (EltVT.getSimpleVT().SimpleTy) { in tryLoadVector()
1164 switch (EltVT.getSimpleVT().SimpleTy) { in tryLoadVector()
1195 switch (EltVT.getSimpleVT().SimpleTy) { in tryLoadVector()
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DNVPTXTargetTransformInfo.cpp113 if (LT.second.SimpleTy == MVT::i64) in getArithmeticInstrCost()
/external/llvm/lib/Target/X86/
DX86FastISel.cpp359 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitLoad()
511 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitStore()
660 switch (VT.getSimpleVT().SimpleTy) { in X86FastEmitStore()
1333 switch (VT.getSimpleVT().SimpleTy) { in X86ChooseCmpOpcode()
1350 switch (VT.getSimpleVT().SimpleTy) { in X86ChooseCmpImmediateOpcode()
1516 if (SrcVT.SimpleTy == MVT::i1) { in X86SelectZExt()
1529 switch (SrcVT.SimpleTy) { in X86SelectZExt()
1646 switch (SourceVT.SimpleTy) { in X86SelectBranch()
1836 switch (VT.SimpleTy) { in X86SelectDivRem()
1880 if (VT.SimpleTy == MVT::i16) { in X86SelectDivRem()
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DX86ISelDAGToDAG.cpp2076 switch (NVT.SimpleTy) { in Select()
2138 switch (NVT.SimpleTy) { in Select()
2165 switch (NVT.SimpleTy) { in Select()
2175 switch (NVT.SimpleTy) { in Select()
2324 switch (NVT.SimpleTy) { in Select()
2332 switch (NVT.SimpleTy) { in Select()
2343 switch (NVT.SimpleTy) { in Select()
2398 switch (NVT.SimpleTy) { in Select()
2532 switch (N0.getSimpleValueType().SimpleTy) { in Select()
2567 switch (N0.getSimpleValueType().SimpleTy) { in Select()
/external/mesa3d/src/gallium/drivers/radeon/
DSIRegisterInfo.cpp55 switch(VT.SimpleTy) { in getCFGStructurizerRegClass()
DR600RegisterInfo.cpp110 switch(VT.SimpleTy) { in getCFGStructurizerRegClass()
DAMDILISelLowering.cpp252 if (VT.getScalarType().getSimpleVT().SimpleTy == MVT::f32 in isFPImmLegal()
253 || VT.getScalarType().getSimpleVT().SimpleTy == MVT::f64) { in isFPImmLegal()
263 if (VT.getScalarType().getSimpleVT().SimpleTy == MVT::f32 in ShouldShrinkFPConstant()
264 || VT.getScalarType().getSimpleVT().SimpleTy == MVT::f64) { in ShouldShrinkFPConstant()
/external/swiftshader/third_party/LLVM/lib/VMCore/
DValueTypes.cpp96 switch (V.SimpleTy) { in getEVTString()
150 switch (V.SimpleTy) { in getTypeForEVT()
/external/llvm/lib/Target/WebAssembly/MCTargetDesc/
DWebAssemblyTargetStreamer.cpp82 Streamer.EmitIntValue(Type.SimpleTy, sizeof(uint64_t)); in EncodeTypes()
/external/llvm/lib/Target/AMDGPU/
DR600RegisterInfo.cpp69 switch(VT.SimpleTy) { in getCFGStructurizerRegClass()
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMFastISel.cpp836 switch (VT.getSimpleVT().SimpleTy) { in ARMSimplifyAddress()
883 if (VT.getSimpleVT().SimpleTy == MVT::f32 || in AddLoadStoreOperands()
884 VT.getSimpleVT().SimpleTy == MVT::f64) in AddLoadStoreOperands()
901 if (!isThumb && VT.getSimpleVT().SimpleTy == MVT::i16) MIB.addReg(0); in AddLoadStoreOperands()
910 if (!isThumb && VT.getSimpleVT().SimpleTy == MVT::i16) MIB.addReg(0); in AddLoadStoreOperands()
922 switch (VT.getSimpleVT().SimpleTy) { in ARMEmitLoad()
979 switch (VT.getSimpleVT().SimpleTy) { in ARMEmitStore()
1113 switch (SourceVT.SimpleTy) { in SelectBranch()
1231 switch (VT.SimpleTy) { in SelectCmp()
2024 switch (SrcVT.getSimpleVT().SimpleTy) { in SelectIntCast()
/external/llvm/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp306 switch (VT.getSimpleVT().SimpleTy) { in isValidIndexedLoad()
334 switch (VT.SimpleTy) { in tryIndexedLoad()
/external/swiftshader/third_party/LLVM/lib/Target/MSP430/
DMSP430ISelDAGToDAG.cpp309 switch (VT.getSimpleVT().SimpleTy) { in isValidIndexedLoad()
337 switch (VT.SimpleTy) { in SelectIndexedLoad()
/external/llvm/lib/IR/
DValueTypes.cpp121 switch (V.SimpleTy) { in getEVTString()
205 switch (V.SimpleTy) { in getTypeForEVT()
/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/
DLegalizeDAG.cpp357 SVT = (MVT::SimpleValueType)(SVT.getSimpleVT().SimpleTy - 1); in ExpandConstantFP()
2313 switch (Node->getValueType(0).getSimpleVT().SimpleTy) { in ExpandFPLibCall()
2330 switch (Node->getValueType(0).getSimpleVT().SimpleTy) { in ExpandIntLibCall()
2345 switch (Node->getValueType(0).getSimpleVT().SimpleTy) { in isDivRemLibcallAvailable()
2390 switch (Node->getValueType(0).getSimpleVT().SimpleTy) { in ExpandDivRemLibCall()
2613 switch (Op0.getValueType().getSimpleVT().SimpleTy) { in ExpandLegalINT_TO_FP()
2660 NewInTy = (MVT::SimpleValueType)(NewInTy.getSimpleVT().SimpleTy+1); in PromoteLegalINT_TO_FP()
2702 NewOutTy = (MVT::SimpleValueType)(NewOutTy.getSimpleVT().SimpleTy+1); in PromoteLegalFP_TO_INT()
2733 switch (VT.getSimpleVT().SimpleTy) { in ExpandBSWAP()
2886 switch (VT.SimpleTy) { in ExpandAtomic()
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