/external/mesa3d/src/gallium/drivers/radeon/ |
D | AMDGPUISelLowering.h | 110 UMUL, // 32bit unsigned multiplication enumerator
|
D | AMDGPUISelLowering.cpp | 337 NODE_NAME_CASE(UMUL); in getTargetNodeName()
|
D | AMDILInstrInfo.td | 124 def IL_umul : SDNode<"AMDGPUISD::UMUL" , SDTIntBinOp,
|
D | AMDILISelLowering.cpp | 728 r20 = DAG.getNode(AMDGPUISD::UMUL, DL, OVT, r20, r1); in LowerSREM32()
|
/external/mesa3d/src/gallium/auxiliary/tgsi/ |
D | tgsi_opcode_tmp.h | 160 OP12(UMUL)
|
/external/mesa3d/src/gallium/state_trackers/d3d1x/gd3d1x/ |
D | sm4_to_tgsi.cpp | 496 OP2_(IMUL, UMUL); in translate_insns() 510 OP2(UMUL); in translate_insns() 557 OP2_(UMUL, MUL); in translate_insns()
|
/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.h | 223 UMUL, // 32bit unsigned multiplication enumerator
|
D | AMDGPUISelLowering.cpp | 2799 NODE_NAME_CASE(UMUL); in getTargetNodeName()
|
/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelLowering.h | 240 UMUL, // LOW, HI, FLAGS = umul LHS, RHS enumerator
|
D | X86ISelDAGToDAG.cpp | 1834 case X86ISD::UMUL: { in Select()
|
D | X86ISelLowering.cpp | 8602 Opc == X86ISD::UMUL || in isX86LogicalCmp() 8610 if (Op.getResNo() == 2 && Opc == X86ISD::UMUL) in isX86LogicalCmp() 8793 Cond.getOpcode() == X86ISD::UMUL) in LowerBRCOND() 10094 SDValue Sum = DAG.getNode(X86ISD::UMUL, DL, VTs, LHS, RHS); in LowerXALUO() 10702 case X86ISD::UMUL: return "X86ISD::UMUL"; in getTargetNodeName() 12319 case X86ISD::UMUL: in computeMaskedBitsForTargetNode()
|
D | X86InstrInfo.td | 214 def X86umul_flag : SDNode<"X86ISD::UMUL", SDT2ResultBinaryArithWithFlags,
|
/external/llvm/lib/Target/X86/ |
D | X86ISelLowering.h | 349 UMUL, enumerator
|
D | X86FastISel.cpp | 2742 BaseOpc = X86ISD::UMUL; CondOpc = X86::SETOr; break; in fastLowerIntrinsicCall() 2782 if (BaseOpc == X86ISD::UMUL && !ResultReg) { in fastLowerIntrinsicCall()
|
D | X86ISelDAGToDAG.cpp | 2133 case X86ISD::UMUL: { in Select()
|
D | X86InstrInfo.td | 243 def X86umul_flag : SDNode<"X86ISD::UMUL", SDT2ResultBinaryArithWithFlags,
|
/external/pcre/dist2/src/sljit/ |
D | sljitNativeSPARC_common.c | 178 #define UMUL (OPC1(0x2) | OPC3(0x0a)) macro 779 …FAIL_IF(push_inst(compiler, (op == SLJIT_LMUL_UW ? UMUL : SMUL) | D(SLJIT_R0) | S1(SLJIT_R0) | S2(… in sljit_emit_op0()
|
/external/swiftshader/third_party/LLVM/lib/Target/Sparc/ |
D | SparcInstrInfo.td | 489 defm UMUL : F3_12np<"umul", 0b001010>;
|
/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
D | nv50_ir_from_tgsi.cpp | 539 NV50_IR_OPCODE_CASE(UMUL, MUL); in translateOpcode()
|
/external/llvm/lib/Target/Sparc/ |
D | SparcInstrInfo.td | 737 defm UMUL : F3_12np<"umul", 0b001010, IIC_iu_umul>;
|
/external/mesa3d/src/mesa/state_tracker/ |
D | st_glsl_to_tgsi.cpp | 658 case2fi(MUL, UMUL); in get_opcode()
|