/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
D | SystemZISelDAGToDAG.cpp | 655 unsigned SubRegIdx = (is32Bit ? in Select() local 669 unsigned SubRegIdx = (is32Bit ? in Select() local 715 unsigned SubRegIdx = (is32Bit ? in Select() local 740 unsigned SubRegIdx = (is32Bit ? in Select() local 753 unsigned SubRegIdx = (is32Bit ? in Select() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | RenameIndependentSubregs.cpp | 182 unsigned SubRegIdx = MO.getSubReg(); in findComponents() local 226 unsigned SubRegIdx = MO.getSubReg(); in rewriteOperands() local 348 unsigned SubRegIdx = MO.getSubReg(); in computeMainRangesFixFlags() local
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D | RegisterPressure.cpp | 519 unsigned SubRegIdx = MO.getSubReg(); in collectOperandLanes() local 537 void pushRegLanes(unsigned Reg, unsigned SubRegIdx, in pushRegLanes() 1213 unsigned SubRegIdx = MO.getSubReg(); in findUseBetween() local
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D | StackMaps.cpp | 160 unsigned SubRegIdx = TRI->getSubRegIndex(LLVMRegNum, MOI->getReg()); in parseOperand() local
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D | VirtRegMap.cpp | 365 unsigned SubRegIdx = MO.getSubReg(); in readsUndefSubreg() local
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D | MachineVerifier.cpp | 1488 unsigned SubRegIdx = MO->getSubReg(); in checkLiveness() local 1589 unsigned SubRegIdx = MO->getSubReg(); in checkLiveness() local
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D | RegisterCoalescer.cpp | 1500 MachineOperand &MO, unsigned SubRegIdx) { in addUndefFlag()
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/external/llvm/lib/CodeGen/ |
D | RenameIndependentSubregs.cpp | 182 unsigned SubRegIdx = MO.getSubReg(); in findComponents() local 225 unsigned SubRegIdx = MO.getSubReg(); in rewriteOperands() local 336 unsigned SubRegIdx = MO.getSubReg(); in computeMainRangesFixFlags() local
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D | VirtRegMap.cpp | 340 unsigned SubRegIdx = MO.getSubReg(); in readsUndefSubreg() local
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D | StackMaps.cpp | 145 unsigned SubRegIdx = TRI->getSubRegIndex(LLVMRegNum, MOI->getReg()); in parseOperand() local
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D | RegisterPressure.cpp | 492 unsigned SubRegIdx = MO.getSubReg(); in collectOperandLanes() local 510 void pushRegLanes(unsigned Reg, unsigned SubRegIdx, in pushRegLanes() 1192 unsigned SubRegIdx = MO.getSubReg(); in findUseBetween() local
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D | MachineVerifier.cpp | 1224 unsigned SubRegIdx = MO->getSubReg(); in checkLiveness() local 1325 unsigned SubRegIdx = MO->getSubReg(); in checkLiveness() local
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D | RegisterCoalescer.cpp | 1217 MachineOperand &MO, unsigned SubRegIdx) { in addUndefFlag()
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/external/llvm/lib/Target/X86/ |
D | X86FixupBWInsts.cpp | 190 const auto SubRegIdx = TRI->getSubRegIndex(SuperDestReg, OrigDestReg); in getSuperRegDestIfDead() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86FixupBWInsts.cpp | 181 const auto SubRegIdx = TRI->getSubRegIndex(SuperDestReg, OrigDestReg); in getSuperRegDestIfDead() local
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D | X86FlagsCopyLowering.cpp | 939 int SubRegIdx[] = {X86::NoSubRegister, X86::sub_8bit, X86::sub_16bit, in rewriteSetCarryExtended() local
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/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/GlobalISel/ |
D | InstructionSelectorImpl.h | 719 int64_t SubRegIdx = MatchTable[CurrentIdx++]; in executeMatchTable() local
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/external/swiftshader/third_party/llvm-7.0/llvm/utils/TableGen/ |
D | CodeGenRegisters.cpp | 476 CodeGenSubRegIndex *SubRegIdx; in computeSecondarySubRegs() local 498 if (CodeGenSubRegIndex *SubRegIdx = getSubRegIndex(SubReg)) { in computeSecondarySubRegs() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCISelDAGToDAG.cpp | 1582 SDValue SubRegIdx = CurDAG->getTargetConstant(PPC::sub_32, dl, MVT::i32); in ExtendToInt64() local 2641 SDValue SubRegIdx = in addExtOrTrunc() local 2651 SDValue SubRegIdx = in addExtOrTrunc() local
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelDAGToDAG.cpp | 1135 unsigned SubRegIdx) { in SelectLoad() 1156 unsigned Opc, unsigned SubRegIdx) { in SelectPostLoad()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64ISelDAGToDAG.cpp | 1192 unsigned SubRegIdx) { in SelectLoad() 1219 unsigned Opc, unsigned SubRegIdx) { in SelectPostLoad()
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/external/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelDAGToDAG.cpp | 212 unsigned SubRegIdx = cast<ConstantSDNode>(SubRegOp)->getZExtValue(); in getOperandRegClass() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMISelDAGToDAG.cpp | 3424 SDValue SubRegIdx = in Select() local 3437 SDValue SubRegIdx = in Select() local
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/external/llvm/lib/Target/ARM/ |
D | ARMISelDAGToDAG.cpp | 3440 SDValue SubRegIdx = in Select() local 3453 SDValue SubRegIdx = in Select() local
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelDAGToDAG.cpp | 345 unsigned SubRegIdx = cast<ConstantSDNode>(SubRegOp)->getZExtValue(); in getOperandRegClass() local
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