| /external/u-boot/board/freescale/p1_p2_rdb_pc/ |
| D | README | 2 --------
4 P1020MSBG-PC
5 P1020RDB-PC
6 P1020RDB-PD
7 P1020UTM-PC
8 P1021RDB-PC
11 P2020RDB-PC
13 They have similar design of P1020RDB but have DDR3 instead of DDR2. P2020RDB-PC
14 has 64-bit DDR. All others have 32-bit DDR.
23 * PCIE slot and mini-PCIE slots
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| D | p1_p2_rdb_pc.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2010-2011, 2013 Freescale Semiconductor, Inc.
35 #define GPIO_GETH_SW_DATA (1 << (31 - GPIO_GETH_SW_PIN))
39 #define GPIO_SLIC_DATA (1 << (31 - GPIO_SLIC_PIN))
44 #define GPIO_DDR_RST_DATA (1 << (31 - GPIO_DDR_RST_PIN))
46 #define GPIO_2BIT_MASK (0x3 << (32 - (GPIO_DDR_RST_PIN + 1) * 2))
59 {1, 1, 2, 0, 0}, /* GPIO7/PB1 - LOAD_DEFAULT_N */
61 {1, 8, 1, 1, 0}, /* GPIO10/PB8 - DDR_RST */
63 {0, 15, 1, 0, 0}, /* GPIO11/A15 - WDI */
139 out_8(&cpld_data->wd_cfg, CPLD_WD_CFG); in board_cpld_init()
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| /external/pdfium/core/fxcodec/jbig2/ |
| D | JBig2_ArithDecoder.cpp | 2 // Use of this source code is governed by a BSD-style license that can be
15 unsigned int Qe; member
22 // Stupid hack to keep clang-format from reformatting this badly.
42 int DecodeNMPS(JBig2ArithCtx* pCX, const JBig2ArithQe& qe) { in DecodeNMPS() argument
43 pCX->I = qe.NMPS; in DecodeNMPS()
44 return pCX->MPS; in DecodeNMPS()
47 int DecodeNLPS(JBig2ArithCtx* pCX, const JBig2ArithQe& qe) { in DecodeNLPS() argument
49 int D = 1 - pCX->MPS; in DecodeNLPS()
50 if (qe.nSwitch == 1) in DecodeNLPS()
51 pCX->MPS = 1 - pCX->MPS; in DecodeNLPS()
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| /external/u-boot/board/freescale/ls1043ardb/ |
| D | ls1043ardb.c | 1 // SPDX-License-Identifier: GPL-2.0+
113 out_be32(&scfg->intpcr, AQR105_IRQ_MASK); in board_init()
123 if (hwconfig("qe-hdlc")) { in config_board_mux()
124 out_be32(&scfg->rcwpmuxcr0, in config_board_mux()
125 (in_be32(&scfg->rcwpmuxcr0) & ~0xff00) | 0x6600); in config_board_mux()
126 printf("Assign to qe-hdlc clk, rcwpmuxcr0=%x\n", in config_board_mux()
127 in_be32(&scfg->rcwpmuxcr0)); in config_board_mux()
130 out_be32(&scfg->rcwpmuxcr0, 0x3333); in config_board_mux()
131 out_be32(&scfg->usbdrvvbus_selcr, SCFG_USBDRVVBUS_SELCR_USB1); in config_board_mux()
138 out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault); in config_board_mux()
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| /external/u-boot/drivers/qe/ |
| D | fdt.c | 1 // SPDX-License-Identifier: GPL-2.0+
18 * If a QE firmware has been uploaded, then add the 'firmware' node under
19 * the 'qe' node.
30 node = fdt_path_offset(blob, "/qe"); in fdt_fixup_qe_firmware()
39 ret = fdt_setprop(blob, node, "extended-modes", in fdt_fixup_qe_firmware()
40 &qe_fw_info->extended_modes, sizeof(u64)); in fdt_fixup_qe_firmware()
44 ret = fdt_setprop_string(blob, node, "id", qe_fw_info->id); in fdt_fixup_qe_firmware()
48 ret = fdt_setprop(blob, node, "virtual-traps", qe_fw_info->vtraps, in fdt_fixup_qe_firmware()
49 sizeof(qe_fw_info->vtraps)); in fdt_fixup_qe_firmware()
61 do_fixup_by_prop_u32(blob, "device_type", "qe", 4, in ft_qe_setup()
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| D | qe.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
38 out_be32(&qe_immr->cp.cecr,(u32) (cmd | QE_CR_FLG)); in qe_issue_cmd()
40 out_be32(&qe_immr->cp.cecdr, cmd_data); in qe_issue_cmd()
41 out_be32(&qe_immr->cp.cecr, (sbc | QE_CR_FLG | in qe_issue_cmd()
46 cecr = in_be32(&qe_immr->cp.cecr); in qe_issue_cmd()
59 align_mask = align - 1; in qe_muram_alloc()
60 savebase = gd->arch.mp_alloc_base; in qe_muram_alloc()
62 off = gd->arch.mp_alloc_base & align_mask; in qe_muram_alloc()
64 gd->arch.mp_alloc_base += (align - off); in qe_muram_alloc()
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| D | uec.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2006-2010 Freescale Semiconductor, Inc.
35 #define UPSMR_TBIM 0x00010000 /* Ten-bit Interface Mode */
39 #define UPSMR_RES1 0x00002000 /* Reserved feild - must be 1 */
58 #define MACCFG2_PREL_SHIFT (31 - 19)
129 #define TEMODER_NUM_OF_QUEUES_SHIFT (15-15)
137 #define REMODER_VLAN_OPERATION_TAGGED_SHIFT (31-9 )
138 #define REMODER_VLAN_OPERATION_NON_TAGGED_SHIFT (31-10)
139 #define REMODER_RX_QOS_MODE_SHIFT (31-15)
142 #define REMODER_NUM_OF_QUEUES_SHIFT (31-23)
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| D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0+
5 obj-$(CONFIG_QE) += qe.o uccf.o uec.o uec_phy.o
6 obj-$(CONFIG_U_QE) += qe.o
7 obj-$(CONFIG_OF_LIBFDT) += fdt.o
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| /external/u-boot/include/linux/ |
| D | immap_qe.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * QUICC Engine (QE) Internal Memory Map.
4 * The Internal Memory Map for devices with QE on them. This
5 * is the superset of all QE devices (8360, etc.).
7 * Copyright (c) 2006-2009, 2011 Freescale Semiconductor, Inc.
38 /* QE I-RAM */
40 u32 iadd; /* I-RAM Address Register */
41 u32 idata; /* I-RAM Data Register */
47 /* QE Interrupt Controller */
72 u32 cecr; /* QE command register */
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| /external/u-boot/include/ |
| D | fsl_qe.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
21 #define QE_DATAONLY_SIZE (QE_MURAM_SIZE - QE_DATAONLY_BASE)
23 /* QE threads SNUM
35 /* QE RISC allocation
48 /* QE CECR commands for UCC fast.
74 /* QE CECR Sub Block Code - sub block code of QE command.
108 /* QE CECR Protocol - For non-MCC, specifies mode for QE CECR command.
117 /* QE ASSIGN PAGE command
177 /* QE CMXGCR register
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| /external/u-boot/board/freescale/p1_twr/ |
| D | p1_twr.c | 1 // SPDX-License-Identifier: GPL-2.0+
36 par_io_t *par_io = (par_io_t *) &(gur->qe_par_io); in get_board_sys_clk()
39 /* Set-up up pin muxing based on board switch settings */ in get_board_sys_clk()
104 /* TDMA - clock option is configured in OS based on board setting */
118 setbits_be32(&gur->pmuxcr, in board_early_init_f()
122 clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA); in board_early_init_f()
134 boot_status = ((gur->porbmsr) >> MPC85xx_PORBMSR_ROMLOC_SHIFT) & 0xf; in checkboard()
160 * Remap Boot flash region to caching-inhibited in board_early_init_r()
164 /* Flush d-cache and invalidate i-cache of any FLASH data */ in board_early_init_r()
168 if (flash_esel == -1) { in board_early_init_r()
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| /external/u-boot/doc/device-tree-bindings/gpio/ |
| D | gpio.txt | 5 -----------------
8 properties, each containing a 'gpio-list':
10 gpio-list ::= <single-gpio> [gpio-list]
11 single-gpio ::= <gpio-phandle> <gpio-specifier>
12 gpio-phandle : phandle to gpio controller node
13 gpio-specifier : Array of #gpio-cells specifying specific gpio
16 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
17 of this GPIO for the device. While a non-existent <name> is considered valid
31 and bit-banged data signals:
34 gpio-controller
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| /external/u-boot/arch/powerpc/include/asm/ |
| D | immap_83xx.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2004-2011 Freescale Semiconductor, Inc.
143 u32 sipnr_h; /* System Internal Interrupt Pending Register - High */
144 u32 sipnr_l; /* System Internal Interrupt Pending Register - Low */
149 u32 simsr_h; /* System Internal Interrupt Mask Register - High */
150 u32 simsr_l; /* System Internal Interrupt Mask Register - Low */
161 u32 sifcr_h; /* System Internal Interrupt Force Register - High */
162 u32 sifcr_l; /* System Internal Interrupt Force Register - Low */
237 * QE Ports Interrupts Registers
241 u32 qepier; /* QE Ports Interrupt Event Register */
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| /external/skia/src/gpu/effects/ |
| D | GrBezierEffect.cpp | 4 * Use of this source code is governed by a BSD-style license that can be
48 this->setTransformDataHelper(ce.localMatrix(), pdman, &transformIter); in setData()
76 varyingHandler->emitAttributes(gp); in onEmitCode()
79 varyingHandler->addVarying("ConicCoeffs", &v); in onEmitCode()
80 vertBuilder->codeAppendf("%s = %s;", v.vsOut(), gp.inConicCoeffs().name()); in onEmitCode()
84 this->setupUniformColor(fragBuilder, uniformHandler, args.fOutputColor, &fColorUniform); in onEmitCode()
87 this->writeOutputPosition(vertBuilder, in onEmitCode()
95 this->emitTransforms(vertBuilder, in onEmitCode()
115 fragBuilder->declAppend(edgeAlpha); in onEmitCode()
116 fragBuilder->declAppend(dklmdx); in onEmitCode()
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| /external/skqp/src/gpu/effects/ |
| D | GrBezierEffect.cpp | 4 * Use of this source code is governed by a BSD-style license that can be
48 this->setTransformDataHelper(ce.localMatrix(), pdman, &transformIter); in setData()
76 varyingHandler->emitAttributes(gp); in onEmitCode()
79 varyingHandler->addVarying("ConicCoeffs", &v); in onEmitCode()
80 vertBuilder->codeAppendf("%s = %s;", v.vsOut(), gp.inConicCoeffs().name()); in onEmitCode()
84 this->setupUniformColor(fragBuilder, uniformHandler, args.fOutputColor, &fColorUniform); in onEmitCode()
87 this->writeOutputPosition(vertBuilder, in onEmitCode()
95 this->emitTransforms(vertBuilder, in onEmitCode()
115 fragBuilder->declAppend(edgeAlpha); in onEmitCode()
116 fragBuilder->declAppend(dklmdx); in onEmitCode()
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| /external/u-boot/board/freescale/mpc8569mds/ |
| D | README | 2 --------
3 MPC8569MDS is composed of two boards - PB (Processor Board) and PIB (Platform
6 Building U-Boot
7 -----------
12 ----------
25 Flashing U-Boot Images
26 ---------------
28 Use the following commands to program U-Boot image into flash:
30 => tftp 1000000 u-boot.bin
37 -----------------------
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| /external/libjpeg-turbo/ |
| D | jcarith.c | 5 * Developed 1997-2009 by Guido Vollbeding.
6 * libjpeg-turbo Modifications:
12 * (implementing Recommendation ITU-T T.81 | ISO/IEC 10918-1).
19 * Recommendation ITU-T T.81 (1992) | ISO/IEC 10918-1:1994.
44 int next_restart_num; /* next restart number to write (0-7) */
75 * of the spec (Kx = Kmin + SRL (8 + Se - Kmin) 4).
80 * (a few - around 5 or so - bytes even for very large files),
84 * Note that currently the marker writing module emits 12-byte
85 * DAC segments for a full-component scan in a color image.
113 (ishift_temp >> (shft)) | ((~0) << (16 - (shft))) : \
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| D | jdarith.c | 5 * Developed 1997-2015 by Guido Vollbeding.
6 * libjpeg-turbo Modifications:
7 * Copyright (C) 2015-2018, D. R. Commander.
12 * (implementing Recommendation ITU-T T.81 | ISO/IEC 10918-1).
19 * Recommendation ITU-T T.81 (1992) | ISO/IEC 10918-1:1994.
27 #define NEG_1 ((unsigned int)-1)
38 /* init: ct = -16 */
40 /* error: ct = -1 */
77 struct jpeg_source_mgr *src = cinfo->src; in get_byte()
79 if (src->bytes_in_buffer == 0) in get_byte()
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| /external/honggfuzz/examples/apache-httpd/corpus_http2/ |
| D | 216cf6ff40ea0d60cc90634547c8d478.00000ebc.honggfuzz.cov | 1 EET /cgi-bin/test-cgi HTTP/1.1
3 Connection: keep-alive
4 Cache-Control: max-�ge=0
5 Upgrade-Insecure-Requests: 1
6 User-Agent: Mozil�a/5.0 (X11; Linux x86_64) AppleWebKit/537.36 (KHTML, like Gecko) Chrome/59.0.3071…
9 Accept-Enco�ing: gzip, deflate, br
10 Acceptser-Agent: Mozil�a/5.0 (X11; Linux x86_64) AppleWebKi��537.36 (KHTML, like Gecko) Chrome/59.0…
12 Content-Length:p-A,ire
17 …z��������@�q���k�bUD�A��- ᩕ���,�S_64�� -�u�8 �El ��>�JD���0������! �7]H�> �r���� o?�…
18 …���'�ھ���[%*U��I�i YPD�Rhϊ��~�����f��-q4CG8�=��&S�<�њ�<vZʧ��ݰ���~ Pw'���s�•&t�W̥\�L���}5…
[all …]
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| /external/honggfuzz/examples/apache-httpd/corpus_http1/ |
| D | 216cf6ff40ea0d60cc90634547c8d478.00000ebc.honggfuzz.cov | 1 EET /cgi-bin/test-cgi HTTP/1.1
3 Connection: keep-alive
4 Cache-Control: max-�ge=0
5 Upgrade-Insecure-Requests: 1
6 User-Agent: Mozil�a/5.0 (X11; Linux x86_64) AppleWebKit/537.36 (KHTML, like Gecko) Chrome/59.0.3071…
9 Accept-Enco�ing: gzip, deflate, br
10 Acceptser-Agent: Mozil�a/5.0 (X11; Linux x86_64) AppleWebKi��537.36 (KHTML, like Gecko) Chrome/59.0…
12 Content-Length:p-A,ire
17 …z��������@�q���k�bUD�A��- ᩕ���,�S_64�� -�u�8 �El ��>�JD���0������! �7]H�> �r���� o?�…
18 …���'�ھ���[%*U��I�i YPD�Rhϊ��~�����f��-q4CG8�=��&S�<�њ�<vZʧ��ݰ���~ Pw'���s�•&t�W̥\�L���}5…
[all …]
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| /external/ImageMagick/PerlMagick/t/reference/read/ |
| D | input_uyvy.miff | 2 class=DirectClass colors=0 alpha-trait=Undefined
7 rendering-intent=Perceptual
9 red-primary=0.64,0.33 green-primary=0.3,0.6 blue-primary=0.15,0.06
10 white-point=0.3127,0.329
11 date:create=2015-04-15T08:36:04-04:00
12 date:modify=2009-09-05T17:47:34-04:00
14 …-|�.{�1{�4{�6{�:x�?x�Bv�Bv�Cu�Eu�Pl�[l�bf�jf�re�ve�tc�rc�lc�ac�_c�^c�[e�We�Ui�Ti�Tg�Tg�Vi�Xi�ad�ed…
|
| /external/u-boot/board/freescale/t104xrdb/ |
| D | t104xrdb.c | 1 // SPDX-License-Identifier: GPL-2.0+
28 struct cpu_type *cpu = gd->arch.cpu; in checkboard()
32 printf("Board: %sD4RDB\n", cpu->name); in checkboard()
34 printf("Board: %sRDB\n", cpu->name); in checkboard()
64 * Remap Boot flash region to caching-inhibited in board_early_init_r()
68 /* Flush d-cache and invalidate i-cache of any FLASH data */ in board_early_init_r()
72 if (flash_esel == -1) { in board_early_init_r()
93 srds_s1 = in_be32(&gur->rcwsr[4]) >> 24; in misc_init_r()
108 if (hwconfig("qe-tdm")) { in misc_init_r()
111 printf("QECSR : 0x%02x, mux to qe-tdm\n", in misc_init_r()
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| /external/linux-kselftest/tools/testing/selftests/ftrace/test.d/kprobe/ |
| D | kprobe_args_string.tc | 2 # SPDX-License-Identifier: GPL-2.0
5 [ -f kprobe_events ] || exit_unsupported # this is configurable
7 case `uname -m` in
35 grep -qe "testprobe.* arg1=\"test\"" trace
42 grep -qe "testprobe.* arg1=\"test\" arg2=\"test\"" trace
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| /external/u-boot/board/freescale/t102xqds/ |
| D | README | 2 ------------------
4 combines two or one 64-bit Power Architecture e5500 core respectively with high
9 and general-purpose embedded computing. Its high level of integration offers
14 - two e5500 cores, each with a private 256 KB L2 cache
15 - Up to 1.4 GHz with 64-bit ISA support (Power Architecture v2.06-compliant)
16 - Three levels of instructions: User, supervisor, and hypervisor
17 - Independent boot and reset
18 - Secure boot capability
19 - 256 KB shared L3 CoreNet platform cache (CPC)
20 - Interconnect CoreNet platform
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| /external/u-boot/board/freescale/mpc8568mds/ |
| D | bcsr.h | 1 /* SPDX-License-Identifier: GPL-2.0+ */
24 0:4 QE PLL
25 5 QE clock
43 1:3 Leds 1-3
72 6 Ready only - indicate flash ready after burning
|