Searched refs:ARMInstrInfo (Results 1 – 25 of 28) sorted by relevance
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32 ARMInstrInfo::ARMInstrInfo(const ARMSubtarget &STI) in ARMInstrInfo() function in ARMInstrInfo36 void ARMInstrInfo::getNoop(MCInst &NopInst) const { in getNoop()52 unsigned ARMInstrInfo::getUnindexedOpcode(unsigned Opc) const { in getUnindexedOpcode()93 void ARMInstrInfo::expandLoadStackGuard(MachineBasicBlock::iterator MI) const { in expandLoadStackGuard()140 ARMInstrInfo::decomposeMachineOperandsTargetFlags(unsigned TF) const { in decomposeMachineOperandsTargetFlags()146 ARMInstrInfo::getSerializableDirectMachineOperandTargetFlags() const { in getSerializableDirectMachineOperandTargetFlags()155 ARMInstrInfo::getSerializableBitmaskMachineOperandTargetFlags() const { in getSerializableBitmaskMachineOperandTargetFlags()
23 class ARMInstrInfo : public ARMBaseInstrInfo {26 explicit ARMInstrInfo(const ARMSubtarget &STI);
36 ARMInstrInfo.cpp
105 ? (ARMBaseInstrInfo *)new ARMInstrInfo(*this) in ARMSubtarget()
308 // See ARMInstrInfo.td for details.1067 include "ARMInstrInfo.td"1068 def ARMInstrInfo : InstrInfo;1093 let InstructionSet = ARMInstrInfo;
35 // ARMInstrInfo.td:
32 ARMInstrInfo::ARMInstrInfo(const ARMSubtarget &STI) in ARMInstrInfo() function in ARMInstrInfo36 void ARMInstrInfo::getNoopForMachoTarget(MCInst &NopInst) const { in getNoopForMachoTarget()52 unsigned ARMInstrInfo::getUnindexedOpcode(unsigned Opc) const { in getUnindexedOpcode()93 void ARMInstrInfo::expandLoadStackGuard(MachineBasicBlock::iterator MI) const { in expandLoadStackGuard()
29 ARMInstrInfo.cpp
99 ? (ARMBaseInstrInfo *)new ARMInstrInfo(*this) in ARMSubtarget()
243 // See ARMInstrInfo.td for details.831 include "ARMInstrInfo.td"833 def ARMInstrInfo : InstrInfo;854 let InstructionSet = ARMInstrInfo;
26 ARMInstrInfo::ARMInstrInfo(const ARMSubtarget &STI) in ARMInstrInfo() function in ARMInstrInfo30 unsigned ARMInstrInfo::getUnindexedOpcode(unsigned Opc) const { in getUnindexedOpcode()
26 class ARMInstrInfo : public ARMBaseInstrInfo {29 explicit ARMInstrInfo(const ARMSubtarget &STI);
65 ARMInstrInfo InstrInfo;91 virtual const ARMInstrInfo *getInstrInfo() const { return &InstrInfo; } in getInstrInfo()
236 include "ARMInstrInfo.td"238 def ARMInstrInfo : InstrInfo;257 let InstructionSet = ARMInstrInfo;
168 const ARMInstrInfo *TII;275 TII = (const ARMInstrInfo*)MF.getTarget().getInstrInfo(); in runOnMachineFunction()
49 const ARMInstrInfo *II;69 II((const ARMInstrInfo *)tm.getInstrInfo()), in ARMCodeEmitter()
505 ARMInstrInfo::commuteInstruction() to support it.
1591 const ARMInstrInfo *TII) { in MatchingStackOffset()1726 const ARMInstrInfo *TII = in IsEligibleForTailCallOptimization()
763 llvm/lib/Target/ARM/ARMInstrInfo.cpp \
527 "llvm/lib/Target/ARM/ARMInstrInfo.cpp",
1138 bool ARMInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
1696 ${LLVM_DIR}/lib/Target/ARM/ARMInstrInfo.cpp
1098 bool ARMInstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,