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Searched refs:CEIL_L_S (Results 1 – 17 of 17) sorted by relevance

/external/v8/src/compiler/mips/
Dinstruction-scheduler-mips.cc357 CEIL_L_S = 4, enumerator
/external/v8/src/compiler/mips64/
Dinstruction-scheduler-mips64.cc390 CEIL_L_S = 4, enumerator
/external/v8/src/mips/
Dconstants-mips.h610 CEIL_L_S = ((1U << 3) + 2), enumerator
Dassembler-mips.cc3016 GenInstrRegister(COP1, S, f0, fs, fd, CEIL_L_S); in ceil_l_s()
Dsimulator-mips.cc3497 case CEIL_L_S: { // Mips32r2 instruction. in DecodeTypeRegisterSRsType()
/external/v8/src/mips64/
Dconstants-mips64.h641 CEIL_L_S = ((1U << 3) + 2), enumerator
Dassembler-mips64.cc3392 GenInstrRegister(COP1, S, f0, fs, fd, CEIL_L_S); in ceil_l_s()
Dsimulator-mips64.cc2909 case CEIL_L_S: { // Mips64r2 instruction. in DecodeTypeRegisterSRsType()
/external/llvm/lib/Target/Mips/
DMipsInstrFPU.td297 def CEIL_L_S : ABSS_FT<"ceil.l.s", FGR64Opnd, FGR32Opnd, II_CEIL>,
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsInstrFPU.td407 def CEIL_L_S : ABSS_FT<"ceil.l.s", FGR64Opnd, FGR32Opnd, II_CEIL>,
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc349 22751U, // CEIL_L_S
2063 0U, // CEIL_L_S
DMipsGenDisassemblerTables.inc4246 /* 700 */ MCD_OPC_Decode, 204, 2, 75, // Opcode: CEIL_L_S
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenMCCodeEmitter.inc866 UINT64_C(1174405130), // CEIL_L_S
3144 case Mips::CEIL_L_S:
8592 …FP64bit | Feature_HasMips2 | Feature_IsNotSoftFloat | Feature_NotInMicroMips | 0, // CEIL_L_S = 853
DMipsGenAsmWriter.inc2081 23522U, // CEIL_L_S
4712 0U, // CEIL_L_S
DMipsGenInstrInfo.inc868 CEIL_L_S = 853,
4913 … 2, 1, 4, 687, 0, 0x4ULL, nullptr, nullptr, OperandInfo184, -1 ,nullptr }, // Inst #853 = CEIL_L_S
DMipsGenDisassemblerTables.inc7139 /* 379 */ MCD::OPC_Decode, 213, 6, 209, 1, // Opcode: CEIL_L_S
DMipsGenAsmMatcher.inc5683 …{ 1984 /* ceil.l.s */, Mips::CEIL_L_S, Convert__FGR64AsmReg1_0__FGR32AsmReg1_1, Feature_HasStdEnc|…