/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/GlobalISel/ |
D | arm-instruction-select-cmp.mir | 426 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 457 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 488 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 519 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 550 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 581 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 612 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 643 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 674 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv 705 ; CHECK: FMSTAT 14, $noreg, implicit-def $cpsr, implicit $fpscr_nzcv [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/ARM/ |
D | fp16-litpool2-arm.mir | 94 FMSTAT 14, $noreg, implicit-def $cpsr, implicit killed $fpscr_nzcv
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D | fp16-litpool3-arm.mir | 100 FMSTAT 14, $noreg, implicit-def $cpsr, implicit killed $fpscr_nzcv
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMISelLowering.h | 58 FMSTAT, // ARM fmstat instruction. enumerator
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D | ARMInstrVFP.td | 24 def arm_fmstat : SDNode<"ARMISD::FMSTAT", SDTNone, [SDNPInGlue, SDNPOutGlue]>; 1067 def FMSTAT : MovFromVFP<0b0001 /* fpscr */, (outs), (ins), 1164 def : VFP2InstAlias<"fmstat${p}", (FMSTAT pred:$p)>;
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D | ARMFastISel.cpp | 1154 TII.get(ARM::FMSTAT))); in SelectBranch() 1267 TII.get(ARM::FMSTAT))); in SelectCmp()
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D | ARMISelLowering.cpp | 830 case ARMISD::FMSTAT: return "ARMISD::FMSTAT"; in getTargetNodeName() 2714 return DAG.getNode(ARMISD::FMSTAT, dl, MVT::Glue, Cmp); in getVFPCmp() 2726 assert(Opc == ARMISD::FMSTAT && "unexpected comparison operation"); in duplicateCmp() 2735 return DAG.getNode(ARMISD::FMSTAT, DL, MVT::Glue, Cmp); in duplicateCmp()
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D | ARMBaseInstrInfo.cpp | 2353 if (DefMI->getOpcode() == ARM::FMSTAT) { in getOperandLatency()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.h | 59 FMSTAT, // ARM fmstat instruction. enumerator
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D | Thumb2SizeReduction.cpp | 238 case ARM::FMSTAT: in isHighLatencyCPSR()
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D | ARMInstrVFP.td | 18 def arm_fmstat : SDNode<"ARMISD::FMSTAT", SDTNone, [SDNPInGlue, SDNPOutGlue]>; 2073 def FMSTAT : MovFromVFP<0b0001 /* fpscr */, (outs), (ins), 2251 def : VFP2InstAlias<"fmstat${p}", (FMSTAT pred:$p)>;
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D | ARMScheduleSwift.td | 659 def : InstRW<[SwiftWriteP0TwoCycle], (instregex "FMSTAT")>;
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D | ARMFastISel.cpp | 1462 TII.get(ARM::FMSTAT))); in ARMEmitCmp()
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D | ARMISelLowering.cpp | 1136 case ARMISD::FMSTAT: return "ARMISD::FMSTAT"; in getTargetNodeName() 3487 return DAG.getNode(ARMISD::FMSTAT, dl, MVT::Glue, Cmp); in getVFPCmp() 3499 assert(Opc == ARMISD::FMSTAT && "unexpected comparison operation"); in duplicateCmp() 3508 return DAG.getNode(ARMISD::FMSTAT, DL, MVT::Glue, Cmp); in duplicateCmp()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.h | 85 FMSTAT, // ARM fmstat instruction. enumerator
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D | ARMInstructionSelector.cpp | 864 CmpConstants Helper(Size == 32 ? ARM::VCMPS : ARM::VCMPD, ARM::FMSTAT, in select()
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D | Thumb2SizeReduction.cpp | 264 case ARM::FMSTAT: in isHighLatencyCPSR()
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D | ARMInstrVFP.td | 22 def arm_fmstat : SDNode<"ARMISD::FMSTAT", SDTNone, [SDNPInGlue, SDNPOutGlue]>; 2240 def FMSTAT : MovFromVFP<0b0001 /* fpscr */, (outs), (ins), 2425 def : VFP2InstAlias<"fmstat${p}", (FMSTAT pred:$p)>;
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D | ARMScheduleSwift.td | 672 def : InstRW<[SwiftWriteP0TwoCycle], (instregex "FMSTAT")>;
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D | ARMScheduleA57.td | 135 def : InstRW<[WriteNoop], (instregex "VMRS", "VMSR", "FMSTAT")>;
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D | ARMFastISel.cpp | 1475 TII.get(ARM::FMSTAT))); in ARMEmitCmp()
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D | ARMISelLowering.cpp | 1261 case ARMISD::FMSTAT: return "ARMISD::FMSTAT"; in getTargetNodeName() 3922 return DAG.getNode(ARMISD::FMSTAT, dl, MVT::Glue, Cmp); in getVFPCmp() 3934 assert(Opc == ARMISD::FMSTAT && "unexpected comparison operation"); in duplicateCmp() 3945 return DAG.getNode(ARMISD::FMSTAT, DL, MVT::Glue, Cmp); in duplicateCmp()
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/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
D | ARMGenAsmWriter.inc | 1118 1625313U, // FMSTAT 4338 0U, // FMSTAT 7032 // BX_RET, ERET, FMSTAT, MOVPCLR, t2CLREX, t2DCPS1, t2DCPS2, t2DCPS3, t2S... 7212 // FMSTAT
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D | ARMGenSubtargetInfo.inc | 5336 { 1, 1, 2, 801, 802 }, // 585 FMSTAT 6341 { 1, 84, 89, 2836, 2837 }, // 585 FMSTAT 7346 { 1, 291, 293, 5760, 5761 }, // 585 FMSTAT 11126 {DBGFIELD("FMSTAT") 1, false, false, 17, 2, 1, 1, 0, 0}, // #585 12533 {DBGFIELD("FMSTAT") 0, false, false, 0, 0, 0, 1, 0, 0}, // #585 13940 {DBGFIELD("FMSTAT") 0, false, false, 0, 0, 0, 0, 0, 0}, // #585 15347 {DBGFIELD("FMSTAT") 1, false, false, 6, 2, 2, 1, 0, 0}, // #585
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/external/capstone/arch/ARM/ |
D | ARMGenAsmWriter.inc | 124 1087998U, // FMSTAT 2917 0U, // FMSTAT 6111 // BX_RET, FMSTAT, MOVPCLR, t2CLREX, t2DCPS1, t2DCPS2, t2DCPS3, tBL, tBLX... 6265 // FMSTAT 8806 // (FMSTAT pred:$p)
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