| /external/llvm/lib/Target/Mips/ |
| D | MipsSERegisterInfo.cpp | 74 case Mips::LD_W: in getLoadStoreOffsetSizeInBits()
91 case Mips::LD_W: in getLoadStoreOffsetAlign()
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| D | MipsSEInstrInfo.cpp | 288 Opc = Mips::LD_W; in loadRegFromStack()
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| D | MipsMSAInstrInfo.td | 3216 def LD_W: LD_W_ENC, LD_W_DESC;
3527 def : MSAPat<(v4f32 (load addrimm10:$addr)), (LD_W addrimm10:$addr)>;
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsSERegisterInfo.cpp | 75 case Mips::LD_W: in getLoadStoreOffsetSizeInBits()
135 case Mips::LD_W: in getLoadStoreOffsetAlign()
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| D | MipsSEInstrInfo.cpp | 363 Opc = Mips::LD_W; in loadRegFromStack()
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| D | MipsMSAInstrInfo.td | 3237 def LD_W: LD_W_ENC, LD_W_DESC;
3548 def : MSAPat<(v4f32 (load addrimm10lsl2:$addr)), (LD_W addrimm10lsl2:$addr)>;
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| /external/webp/src/dsp/ |
| D | msa_macro.h | 56 #define LD_W(RTYPE, psrc) *((RTYPE*)(psrc)) macro
57 #define LD_UW(...) LD_W(v4u32, __VA_ARGS__)
58 #define LD_SW(...) LD_W(v4i32, __VA_ARGS__)
271 out0 = LD_W(RTYPE, psrc); \
272 out1 = LD_W(RTYPE, psrc + stride); \
279 out2 = LD_W(RTYPE, psrc + 2 * stride); \
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| /external/libvpx/libvpx/vp8/common/mips/msa/ |
| D | vp8_macros_msa.h | 27 #define LD_W(RTYPE, psrc) *((const RTYPE *)(psrc)) macro
28 #define LD_UW(...) LD_W(v4u32, __VA_ARGS__)
29 #define LD_SW(...) LD_W(v4i32, __VA_ARGS__)
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| /external/v8/src/mips/ |
| D | constants-mips.h | 749 LD_W = ((8U << 2) + 2), enumerator
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| D | assembler-mips.cc | 3260 V(ld_w, LD_W) \
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| /external/libaom/libaom/aom_dsp/mips/ |
| D | macros_msa.h | 29 #define LD_W(RTYPE, psrc) *((const RTYPE *)(psrc)) macro
30 #define LD_SW(...) LD_W(v4i32, __VA_ARGS__)
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| /external/v8/src/mips64/ |
| D | constants-mips64.h | 783 LD_W = ((8U << 2) + 2), enumerator
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| D | assembler-mips64.cc | 3577 V(ld_w, LD_W) \
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| /external/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 1494 case Mips::LD_W: in DecodeMSA128Mem()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 1724 case Mips::LD_W: in DecodeMSA128Mem()
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| /external/capstone/arch/Mips/ |
| D | MipsGenAsmWriter.inc | 937 12606549U, // LD_W
2651 0U, // LD_W
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| D | MipsGenDisassemblerTables.inc | 2996 /* 10552 */ MCD_OPC_Decode, 152, 7, 167, 1, // Opcode: LD_W
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenMCCodeEmitter.inc | 1656 UINT64_C(2013265954), // LD_W
2842 case Mips::LD_W:
9382 Feature_HasStdEnc | Feature_HasMSA | 0, // LD_W = 1643
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| D | MipsGenAsmWriter.inc | 2871 25190340U, // LD_W
5502 0U, // LD_W
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| D | MipsGenDAGISel.inc | 1315 /* 2337*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::LD_W), 0|OPFL_Chain|OPFL_MemRefs,
1318 // Dst: (LD_W:{ *:[v4i32] } addrimm10lsl2:{ *:[iPTR] }:$addr)
1361 /* 2439*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::LD_W), 0|OPFL_Chain|OPFL_MemRefs,
1364 // Dst: (LD_W:{ *:[v4f32] } addrimm10lsl2:{ *:[iPTR] }:$addr)
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| D | MipsGenInstrInfo.inc | 1658 LD_W = 1643,
5703 …ULL<<MCID::MayLoad), 0x6ULL, nullptr, nullptr, OperandInfo270, -1 ,nullptr }, // Inst #1643 = LD_W
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| D | MipsGenDisassemblerTables.inc | 5455 /* 13416 */ MCD::OPC_Decode, 235, 12, 175, 2, // Opcode: LD_W
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| D | MipsGenAsmMatcher.inc | 6442 …{ 5445 /* ld.w */, Mips::LD_W, Convert__MSA128AsmReg1_0__MemOffsetSimm10_22_1, Feature_HasStdEnc|F…
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