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Searched refs:VR128X (Results 1 – 12 of 12) sorted by relevance

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrAVX512.td138 def v16i8x_info : X86VectorVTInfo<16, i8, VR128X, "b">;
139 def v8i16x_info : X86VectorVTInfo<8, i16, VR128X, "w">;
140 def v4i32x_info : X86VectorVTInfo<4, i32, VR128X, "d">;
141 def v2i64x_info : X86VectorVTInfo<2, i64, VR128X, "q">;
142 def v4f32x_info : X86VectorVTInfo<4, f32, VR128X, "ps">;
143 def v2f64x_info : X86VectorVTInfo<2, f64, VR128X, "pd">;
149 def f32x_info : X86VectorVTInfo<1, f32, VR128X, "ss">;
150 def f64x_info : X86VectorVTInfo<1, f64, VR128X, "sd">;
476 def AVX512_128_SET0 : I<0, Pseudo, (outs VR128X:$dst), (ins), "",
477 [(set VR128X:$dst, (v4i32 immAllZerosV))]>;
[all …]
DX86InstrVecCompiler.td279 defm : subvec_zero_lowering<"APDZ128", VR128X, v4f64, v2f64, v8i32, sub_xmm>;
280 defm : subvec_zero_lowering<"APSZ128", VR128X, v8f32, v4f32, v8i32, sub_xmm>;
281 defm : subvec_zero_lowering<"DQA64Z128", VR128X, v4i64, v2i64, v8i32, sub_xmm>;
282 defm : subvec_zero_lowering<"DQA64Z128", VR128X, v8i32, v4i32, v8i32, sub_xmm>;
283 defm : subvec_zero_lowering<"DQA64Z128", VR128X, v16i16, v8i16, v8i32, sub_xmm>;
284 defm : subvec_zero_lowering<"DQA64Z128", VR128X, v32i8, v16i8, v8i32, sub_xmm>;
286 defm : subvec_zero_lowering<"APDZ128", VR128X, v8f64, v2f64, v16i32, sub_xmm>;
287 defm : subvec_zero_lowering<"APSZ128", VR128X, v16f32, v4f32, v16i32, sub_xmm>;
288 defm : subvec_zero_lowering<"DQA64Z128", VR128X, v8i64, v2i64, v16i32, sub_xmm>;
289 defm : subvec_zero_lowering<"DQA64Z128", VR128X, v16i32, v4i32, v16i32, sub_xmm>;
[all …]
DX86FastISel.cpp2233 const TargetRegisterClass *VR128X = &X86::VR128XRegClass; in X86FastEmitSSESelect() local
2243 unsigned ImplicitDefReg = createResultReg(VR128X); in X86FastEmitSSESelect()
2251 unsigned MovReg = fastEmitInst_rrrr(MovOpcode, VR128X, RHSReg, RHSIsKill, in X86FastEmitSSESelect()
DX86RegisterInfo.td568 def VR128X : RegisterClass<"X86", [v4f32, v2f64, v16i8, v8i16, v4i32, v2i64, f128],
DX86InstrInfo.td408 def vx64xmem : X86VMemOperand<VR128X, "printi64mem", X86Mem64_RC128XOperand>;
409 def vx128xmem : X86VMemOperand<VR128X, "printi128mem", X86Mem128_RC128XOperand>;
410 def vx256xmem : X86VMemOperand<VR128X, "printi256mem", X86Mem256_RC128XOperand>;
/external/llvm/lib/Target/X86/
DX86InstrAVX512.td149 def v16i8x_info : X86VectorVTInfo<16, i8, VR128X, "b">;
150 def v8i16x_info : X86VectorVTInfo<8, i16, VR128X, "w">;
151 def v4i32x_info : X86VectorVTInfo<4, i32, VR128X, "d">;
152 def v2i64x_info : X86VectorVTInfo<2, i64, VR128X, "q">;
153 def v4f32x_info : X86VectorVTInfo<4, f32, VR128X, "ps">;
154 def v2f64x_info : X86VectorVTInfo<2, f64, VR128X, "pd">;
160 def f32x_info : X86VectorVTInfo<1, f32, VR128X, "ss">;
161 def f64x_info : X86VectorVTInfo<1, f64, VR128X, "sd">;
425 def AVX512_128_SET0 : I<0, Pseudo, (outs VR128X:$dst), (ins), "",
426 [(set VR128X:$dst, (v4i32 immAllZerosV))]>;
[all …]
DX86RegisterInfo.td505 def VR128X : RegisterClass<"X86", [v4f32, v2f64, v16i8, v8i16, v4i32, v2i64],
DX86InstrInfo.td374 def vx64xmem : X86VMemOperand<VR128X, "printi64mem", X86Mem64_RC128XOperand>;
375 def vx128xmem : X86VMemOperand<VR128X, "printi128mem", X86Mem128_RC128XOperand>;
376 def vx256xmem : X86VMemOperand<VR128X, "printi256mem", X86Mem256_RC128XOperand>;
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/X86/
DX86GenGlobalISel.inc1207 …:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPADDQZ128rr:{ *:[v2i…
1291 …:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPADDDZ128rr:{ *:[v4i…
1404 …:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPADDWZ128rr:{ *:[v8i…
1488 …:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPADDBZ128rr:{ *:[v16…
1839 …:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPSUBQZ128rr:{ *:[v2i…
1879 …:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPSUBDZ128rr:{ *:[v4i…
1948 …:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPSUBWZ128rr:{ *:[v8i…
2032 …:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPSUBBZ128rr:{ *:[v16…
2322 …{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMULLQZ128rr:{ *:[v2i…
2360 …{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMULLDZ128rr:{ *:[v4i…
[all …]
DX86GenRegisterInfo.inc1980 // VR128X Register Class...
1981 const MCPhysReg VR128X[] = {
1985 // VR128X Bit set.
2264 { VR128X, VR128XBits, 735, 32, sizeof(VR128XBits), X86::VR128XRegClassID, 16, 1, true },
4117 { 128, 128, 128, VTLists+16 }, // VR128X
7337 { // VR128X
7553 {1, 32}, // VR128X
DX86GenAsmMatcher.inc4670 MCK_FR32X, // register class 'FR32X,FR64X,VR128X'
/external/capstone/arch/X86/
DX86GenRegisterInfo.inc1367 // VR128X Register Class...
1368 static MCPhysReg VR128X[] = {
1372 // VR128X Bit set.
1507 …{ CAPSTONE_REGISTER_CLASS("VR128X"), VR128X, VR128XBits, 32, sizeof(VR128XBits), X86_VR128XRegClas…