/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 3151 unsigned VTBits = VT.getScalarSizeInBits(); in ComputeNumSignBits() local 3172 return VTBits-Tmp+1; in ComputeNumSignBits() 3175 return VTBits-Tmp; in ComputeNumSignBits() 3178 Tmp = VTBits; in ComputeNumSignBits() 3187 if (SrcOp.getValueSizeInBits() != VTBits) { in ComputeNumSignBits() 3188 assert(SrcOp.getValueSizeInBits() > VTBits && in ComputeNumSignBits() 3190 unsigned ExtraBits = SrcOp.getValueSizeInBits() - VTBits; in ComputeNumSignBits() 3226 assert(Tmp <= VTBits && "Failed to determine minimum sign bits"); in ComputeNumSignBits() 3240 if (VTBits == SrcBits) in ComputeNumSignBits() 3246 if ((SrcBits % VTBits) == 0) { in ComputeNumSignBits() [all …]
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D | LegalizeIntegerTypes.cpp | 1513 unsigned VTBits = N->getValueType(0).getSizeInBits(); in ExpandShiftByConstant() local 1518 if (Amt.ugt(VTBits)) { in ExpandShiftByConstant() 1539 if (Amt.ugt(VTBits)) { in ExpandShiftByConstant() 1560 if (Amt.ugt(VTBits)) { in ExpandShiftByConstant()
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D | DAGCombiner.cpp | 7933 unsigned VTBits = SVT.getSizeInBits(); in tryToFoldExtendOfConstant() local 7951 Elts.push_back(DAG.getConstant(C.sext(VTBits), DL, SVT)); in tryToFoldExtendOfConstant() 7953 Elts.push_back(DAG.getConstant(C.zext(VTBits), DL, SVT)); in tryToFoldExtendOfConstant() 9216 unsigned VTBits = VT.getScalarSizeInBits(); in visitSIGN_EXTEND_INREG() local 9227 if (DAG.ComputeNumSignBits(N0) >= VTBits-EVTBits+1) in visitSIGN_EXTEND_INREG() 9266 if (DAG.MaskedValueIsZero(N0, APInt::getOneBitSet(VTBits, EVTBits - 1))) in visitSIGN_EXTEND_INREG() 9284 if (ShAmt->getZExtValue()+EVTBits <= VTBits) { in visitSIGN_EXTEND_INREG() 9288 if (VTBits-(ShAmt->getZExtValue()+EVTBits) < InSignBits) in visitSIGN_EXTEND_INREG()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 2097 unsigned VTBits = VT.getScalarType().getSizeInBits(); in ComputeNumSignBits() local 2108 return VTBits-Tmp+1; in ComputeNumSignBits() 2111 return VTBits-Tmp; in ComputeNumSignBits() 2119 Tmp = VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); in ComputeNumSignBits() 2126 Tmp = VTBits-Tmp+1; in ComputeNumSignBits() 2136 if (Tmp > VTBits) Tmp = VTBits; in ComputeNumSignBits() 2143 if (C->getZExtValue() >= VTBits || // Bad shift. in ComputeNumSignBits() 2181 return VTBits; in ComputeNumSignBits() 2186 unsigned RotAmt = C->getZExtValue() & (VTBits-1); in ComputeNumSignBits() 2190 RotAmt = (VTBits-RotAmt) & (VTBits-1); in ComputeNumSignBits() [all …]
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D | LegalizeIntegerTypes.cpp | 1262 unsigned VTBits = N->getValueType(0).getSizeInBits(); in ExpandShiftByConstant() local 1267 if (Amt > VTBits) { in ExpandShiftByConstant() 1297 if (Amt > VTBits) { in ExpandShiftByConstant() 1319 if (Amt > VTBits) { in ExpandShiftByConstant()
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D | DAGCombiner.cpp | 4739 unsigned VTBits = VT.getScalarType().getSizeInBits(); in visitSIGN_EXTEND_INREG() local 4747 if (DAG.ComputeNumSignBits(N0) >= VTBits-EVTBits+1) in visitSIGN_EXTEND_INREG() 4768 if (DAG.MaskedValueIsZero(N0, APInt::getBitsSet(VTBits, EVTBits-1, EVTBits))) in visitSIGN_EXTEND_INREG() 4787 if (ShAmt->getZExtValue()+EVTBits <= VTBits) { in visitSIGN_EXTEND_INREG() 4791 if (VTBits-(ShAmt->getZExtValue()+EVTBits) < InSignBits) in visitSIGN_EXTEND_INREG()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Lanai/ |
D | LanaiISelLowering.cpp | 1238 unsigned VTBits = VT.getSizeInBits(); in LowerSHL_PARTS() local 1253 DAG.getConstant(VTBits, dl, MVT::i32), ShAmt); in LowerSHL_PARTS() 1263 DAG.getConstant(VTBits, dl, MVT::i32)); in LowerSHL_PARTS() 1287 unsigned VTBits = VT.getSizeInBits(); in LowerSRL_PARTS() local 1306 ISD::SUB, dl, MVT::i32, DAG.getConstant(VTBits, dl, MVT::i32), ShAmt); in LowerSRL_PARTS()
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/external/llvm/lib/CodeGen/SelectionDAG/ |
D | SelectionDAG.cpp | 2530 unsigned VTBits = VT.getScalarType().getSizeInBits(); in ComputeNumSignBits() local 2541 return VTBits-Tmp+1; in ComputeNumSignBits() 2544 return VTBits-Tmp; in ComputeNumSignBits() 2553 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits(); in ComputeNumSignBits() 2560 Tmp = VTBits-Tmp+1; in ComputeNumSignBits() 2570 if (Tmp > VTBits) Tmp = VTBits; in ComputeNumSignBits() 2577 if (C->getZExtValue() >= VTBits || // Bad shift. in ComputeNumSignBits() 2629 return VTBits; in ComputeNumSignBits() 2635 return VTBits; in ComputeNumSignBits() 2640 unsigned RotAmt = C->getZExtValue() & (VTBits-1); in ComputeNumSignBits() [all …]
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D | LegalizeIntegerTypes.cpp | 1438 unsigned VTBits = N->getValueType(0).getSizeInBits(); in ExpandShiftByConstant() local 1443 if (Amt.ugt(VTBits)) { in ExpandShiftByConstant() 1464 if (Amt.ugt(VTBits)) { in ExpandShiftByConstant() 1485 if (Amt.ugt(VTBits)) { in ExpandShiftByConstant()
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D | DAGCombiner.cpp | 5807 unsigned VTBits = SVT.getSizeInBits(); in tryToFoldExtendOfConstant() local 5825 Elts.push_back(DAG.getConstant(C.sext(VTBits), DL, SVT)); in tryToFoldExtendOfConstant() 5827 Elts.push_back(DAG.getConstant(C.zext(VTBits), DL, SVT)); in tryToFoldExtendOfConstant() 6945 unsigned VTBits = VT.getScalarType().getSizeInBits(); in visitSIGN_EXTEND_INREG() local 6956 if (DAG.ComputeNumSignBits(N0) >= VTBits-EVTBits+1) in visitSIGN_EXTEND_INREG() 6976 if (DAG.MaskedValueIsZero(N0, APInt::getBitsSet(VTBits, EVTBits-1, EVTBits))) in visitSIGN_EXTEND_INREG() 6994 if (ShAmt->getZExtValue()+EVTBits <= VTBits) { in visitSIGN_EXTEND_INREG() 6998 if (VTBits-(ShAmt->getZExtValue()+EVTBits) < InSignBits) in visitSIGN_EXTEND_INREG()
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D | TargetLowering.cpp | 871 unsigned VTBits = Op->getValueType(0).getScalarType().getSizeInBits(); in SimplifyDemandedBits() local 873 TLO.DAG.ComputeNumSignBits(InOp) >= VTBits-ShAmt+1; in SimplifyDemandedBits()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.cpp | 1904 unsigned VTBits = VT.getSizeInBits(); in LowerShiftRightParts() local 1911 if (VTBits == 32 && STI.getSmVersion() >= 35) { in LowerShiftRightParts() 1934 DAG.getConstant(VTBits, dl, MVT::i32), in LowerShiftRightParts() 1938 DAG.getConstant(VTBits, dl, MVT::i32)); in LowerShiftRightParts() 1944 DAG.getConstant(VTBits, dl, MVT::i32), in LowerShiftRightParts() 1965 unsigned VTBits = VT.getSizeInBits(); in LowerShiftLeftParts() local 1971 if (VTBits == 32 && STI.getSmVersion() >= 35) { in LowerShiftLeftParts() 1994 DAG.getConstant(VTBits, dl, MVT::i32), in LowerShiftLeftParts() 1998 DAG.getConstant(VTBits, dl, MVT::i32)); in LowerShiftLeftParts() 2004 DAG.getConstant(VTBits, dl, MVT::i32), in LowerShiftLeftParts()
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.cpp | 1709 unsigned VTBits = VT.getSizeInBits(); in LowerShiftRightParts() local 1716 if (VTBits == 32 && STI.getSmVersion() >= 35) { in LowerShiftRightParts() 1741 DAG.getConstant(VTBits, dl, MVT::i32), in LowerShiftRightParts() 1745 DAG.getConstant(VTBits, dl, MVT::i32)); in LowerShiftRightParts() 1751 DAG.getConstant(VTBits, dl, MVT::i32), in LowerShiftRightParts() 1772 unsigned VTBits = VT.getSizeInBits(); in LowerShiftLeftParts() local 1778 if (VTBits == 32 && STI.getSmVersion() >= 35) { in LowerShiftLeftParts() 1803 DAG.getConstant(VTBits, dl, MVT::i32), in LowerShiftLeftParts() 1807 DAG.getConstant(VTBits, dl, MVT::i32)); in LowerShiftLeftParts() 1813 DAG.getConstant(VTBits, dl, MVT::i32), in LowerShiftLeftParts()
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/external/llvm/lib/Target/Lanai/ |
D | LanaiISelLowering.cpp | 1241 unsigned VTBits = VT.getSizeInBits(); in LowerSRL_PARTS() local 1260 ISD::SUB, dl, MVT::i32, DAG.getConstant(VTBits, dl, MVT::i32), ShAmt); in LowerSRL_PARTS()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 5912 unsigned VTBits = VT.getScalarSizeInBits(); in computeNumSignBitsBinOp() local 5913 if (SrcBitWidth > VTBits) { // PACK in computeNumSignBitsBinOp() 5914 unsigned SrcExtraBits = SrcBitWidth - VTBits; in computeNumSignBitsBinOp() 5919 assert (SrcBitWidth == VTBits && "Expected operands of same bitwidth."); in computeNumSignBitsBinOp() 5959 unsigned VTBits = VT.getScalarSizeInBits(); in ComputeNumSignBitsForTargetNode() local 5960 Tmp += VTBits - PackedOp.getScalarValueSizeInBits(); in ComputeNumSignBitsForTargetNode()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 3263 unsigned VTBits = VT.getSizeInBits(); in LowerShiftRightParts() local 3274 DAG.getConstant(VTBits, MVT::i32), ShAmt); in LowerShiftRightParts() 3277 DAG.getConstant(VTBits, MVT::i32)); in LowerShiftRightParts() 3299 unsigned VTBits = VT.getSizeInBits(); in LowerShiftLeftParts() local 3308 DAG.getConstant(VTBits, MVT::i32), ShAmt); in LowerShiftLeftParts() 3311 DAG.getConstant(VTBits, MVT::i32)); in LowerShiftLeftParts()
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/external/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 4433 unsigned VTBits = VT.getSizeInBits(); in LowerShiftRightParts() local 4443 DAG.getConstant(VTBits, dl, MVT::i64), ShAmt); in LowerShiftRightParts() 4456 DAG.getConstant(VTBits, dl, MVT::i64)); in LowerShiftRightParts() 4475 DAG.getConstant(VTBits - 1, dl, MVT::i64)) in LowerShiftRightParts() 4491 unsigned VTBits = VT.getSizeInBits(); in LowerShiftLeftParts() local 4499 DAG.getConstant(VTBits, dl, MVT::i64), ShAmt); in LowerShiftLeftParts() 4512 DAG.getConstant(VTBits, dl, MVT::i64)); in LowerShiftLeftParts()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 5097 unsigned VTBits = VT.getSizeInBits(); in LowerShiftRightParts() local 5107 DAG.getConstant(VTBits, dl, MVT::i64), ShAmt); in LowerShiftRightParts() 5120 DAG.getConstant(VTBits, dl, MVT::i64)); in LowerShiftRightParts() 5139 DAG.getConstant(VTBits - 1, dl, MVT::i64)) in LowerShiftRightParts() 5154 unsigned VTBits = VT.getSizeInBits(); in LowerShiftLeftParts() local 5162 DAG.getConstant(VTBits, dl, MVT::i64), ShAmt); in LowerShiftLeftParts() 5175 DAG.getConstant(VTBits, dl, MVT::i64)); in LowerShiftLeftParts()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 16179 unsigned VTBits = VT.getSizeInBits(); in LowerShiftParts() local 16189 DAG.getConstant(VTBits - 1, dl, MVT::i8)); in LowerShiftParts() 16191 DAG.getConstant(VTBits - 1, dl, MVT::i8)) in LowerShiftParts() 16207 DAG.getConstant(VTBits, dl, MVT::i8)); in LowerShiftParts() 29029 unsigned VTBits = Op.getScalarValueSizeInBits(); in ComputeNumSignBitsForTargetNode() local 29034 return VTBits; in ComputeNumSignBitsForTargetNode() 29040 Tmp += VTBits - Src.getScalarValueSizeInBits(); in ComputeNumSignBitsForTargetNode() 29048 assert(VTBits < NumSrcBits && "Illegal truncation input type"); in ComputeNumSignBitsForTargetNode() 29050 if (Tmp > (NumSrcBits - VTBits)) in ComputeNumSignBitsForTargetNode() 29051 return Tmp - (NumSrcBits - VTBits); in ComputeNumSignBitsForTargetNode() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 5264 unsigned VTBits = VT.getSizeInBits(); in LowerShiftRightParts() local 5276 DAG.getConstant(VTBits, dl, MVT::i32), ShAmt); in LowerShiftRightParts() 5279 DAG.getConstant(VTBits, dl, MVT::i32)); in LowerShiftRightParts() 5291 DAG.getConstant(VTBits - 1, dl, VT)) in LowerShiftRightParts() 5308 unsigned VTBits = VT.getSizeInBits(); in LowerShiftLeftParts() local 5318 DAG.getConstant(VTBits, dl, MVT::i32), ShAmt); in LowerShiftLeftParts() 5324 DAG.getConstant(VTBits, dl, MVT::i32)); in LowerShiftLeftParts()
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/external/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 4521 unsigned VTBits = VT.getSizeInBits(); in LowerShiftRightParts() local 4532 DAG.getConstant(VTBits, dl, MVT::i32), ShAmt); in LowerShiftRightParts() 4535 DAG.getConstant(VTBits, dl, MVT::i32)); in LowerShiftRightParts() 4557 unsigned VTBits = VT.getSizeInBits(); in LowerShiftLeftParts() local 4566 DAG.getConstant(VTBits, dl, MVT::i32), ShAmt); in LowerShiftLeftParts() 4569 DAG.getConstant(VTBits, dl, MVT::i32)); in LowerShiftLeftParts()
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/external/swiftshader/third_party/LLVM/lib/Target/X86/ |
D | X86ISelLowering.cpp | 7548 unsigned VTBits = VT.getSizeInBits(); in LowerShiftParts() local 7555 DAG.getConstant(VTBits - 1, MVT::i8)) in LowerShiftParts() 7568 DAG.getConstant(VTBits, MVT::i8)); in LowerShiftParts()
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