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Searched refs:getDeadRegState (Results 1 – 25 of 26) sorted by relevance

12

/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/
DAVRExpandPseudoInsts.cpp154 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandArith()
159 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandArith()
187 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLogic()
195 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLogic()
235 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLogicImm()
245 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expandLogicImm()
283 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
287 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
340 .addReg(DstLoReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
348 .addReg(DstHiReg, RegState::Define | getDeadRegState(DstIsDead)) in expand()
[all …]
/external/swiftshader/third_party/LLVM/lib/Target/ARM/
DARMExpandPseudoInsts.cpp425 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)) in ExpandVLD()
426 .addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
428 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
430 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
461 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); in ExpandVLD()
552 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
554 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
556 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
558 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
600 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); in ExpandLaneOp()
[all …]
DMLxExpansionPass.cpp233 .addReg(DstReg, getDefRegState(true) | getDeadRegState(DstDead)); in ExpandFPMLxInstruction()
DARMBaseInstrInfo.h306 return MIB.addReg(ARM::CPSR, getDefRegState(true) | getDeadRegState(isDead));
DARMLoadStoreOptimizer.cpp1056 .addReg(Reg, getDefRegState(true) | getDeadRegState(RegDeadKill)) in InsertLDR_STR()
1110 .addReg(EvenReg, getDefRegState(isLd) | getDeadRegState(EvenDeadKill)) in FixInvalidRegPairOp()
1111 .addReg(OddReg, getDefRegState(isLd) | getDeadRegState(OddDeadKill)); in FixInvalidRegPairOp()
/external/llvm/lib/Target/ARM/
DARMExpandPseudoInsts.cpp409 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
411 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
413 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
415 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
446 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); in ExpandVLD()
542 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
544 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
546 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
548 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
590 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); in ExpandLaneOp()
[all …]
DMLxExpansionPass.cpp301 .addReg(DstReg, getDefRegState(true) | getDeadRegState(DstDead)); in ExpandFPMLxInstruction()
DARMBaseInstrInfo.h411 return MIB.addReg(ARM::CPSR, getDefRegState(true) | getDeadRegState(isDead));
DARMLoadStoreOptimizer.cpp1560 .addReg(Reg, getDefRegState(true) | getDeadRegState(RegDeadKill)) in InsertLDR_STR()
1623 .addReg(EvenReg, getDefRegState(isLd) | getDeadRegState(EvenDeadKill)) in FixInvalidRegPairOp()
1624 .addReg(OddReg, getDefRegState(isLd) | getDeadRegState(OddDeadKill)); in FixInvalidRegPairOp()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/
DARMExpandPseudoInsts.cpp498 MIB.addReg(DstRegPair, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
502 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
504 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
506 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
508 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); in ExpandVLD()
569 MIB.addReg(DstReg, RegState::ImplicitDefine | getDeadRegState(DstIsDead)); in ExpandVLD()
687 MIB.addReg(D0, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
689 MIB.addReg(D1, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
691 MIB.addReg(D2, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
693 MIB.addReg(D3, RegState::Define | getDeadRegState(DstIsDead)); in ExpandLaneOp()
[all …]
DMLxExpansionPass.cpp301 .addReg(DstReg, getDefRegState(true) | getDeadRegState(DstDead)); in ExpandFPMLxInstruction()
DARMLoadStoreOptimizer.cpp1600 .addReg(Reg, getDefRegState(true) | getDeadRegState(RegDeadKill)) in InsertLDR_STR()
1665 .addReg(EvenReg, getDefRegState(isLd) | getDeadRegState(EvenDeadKill)) in FixInvalidRegPairOp()
1666 .addReg(OddReg, getDefRegState(isLd) | getDeadRegState(OddDeadKill)); in FixInvalidRegPairOp()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/
DAArch64ExpandPseudoInsts.cpp180 RegState::Define | getDeadRegState(DstIsDead && CountThree)) in tryToreplicateChunks()
204 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in tryToreplicateChunks()
353 RegState::Define | getDeadRegState(DstIsDead && SingleMovk)) in trySequenceOfOnes()
369 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in trySequenceOfOnes()
468 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in expandMOVImm()
553 getDeadRegState(DstIsDead && Shift == LastShift)) in expandMOVImmSimple()
578 getDeadRegState(DstIsDead && Shift == LastShift)) in expandMOVImmSimple()
/external/llvm/lib/Target/AArch64/
DAArch64ExpandPseudoInsts.cpp131 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in tryOrrMovk()
209 RegState::Define | getDeadRegState(DstIsDead && CountThree)) in tryToreplicateChunks()
233 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in tryToreplicateChunks()
383 RegState::Define | getDeadRegState(DstIsDead && SingleMovk)) in trySequenceOfOnes()
399 .addReg(DstReg, RegState::Define | getDeadRegState(DstIsDead)) in trySequenceOfOnes()
556 getDeadRegState(DstIsDead && Shift == LastShift)) in expandMOVImm()
581 getDeadRegState(DstIsDead && Shift == LastShift)) in expandMOVImm()
/external/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h381 inline unsigned getDeadRegState(bool B) { in getDeadRegState() function
400 getDeadRegState(RegOp.isDead()) | in getRegState()
/external/swiftshader/third_party/llvm-7.0/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h462 inline unsigned getDeadRegState(bool B) { in getDeadRegState() function
484 getDeadRegState(RegOp.isDead()) | in getRegState()
/external/swiftshader/third_party/LLVM/lib/Target/X86/
DX86InstrInfo.cpp1411 .addReg(Dest, RegState::Define | getDeadRegState(isDead)) in convertToThreeAddressWithLEA()
1468 .addReg(A, RegState::Define | getDeadRegState(isDead)) in convertToThreeAddress()
1485 .addReg(Dest, RegState::Define | getDeadRegState(isDead)) in convertToThreeAddress()
1505 .addReg(Dest, RegState::Define | getDeadRegState(isDead)) in convertToThreeAddress()
1520 .addReg(Dest, RegState::Define | getDeadRegState(isDead)) in convertToThreeAddress()
1551 getDeadRegState(isDead)), in convertToThreeAddress()
1562 getDeadRegState(isDead)), in convertToThreeAddress()
1580 getDeadRegState(isDead)), in convertToThreeAddress()
1591 getDeadRegState(isDead)), in convertToThreeAddress()
1620 getDeadRegState(isDead)), in convertToThreeAddress()
[all …]
/external/swiftshader/third_party/LLVM/include/llvm/CodeGen/
DMachineInstrBuilder.h255 inline unsigned getDeadRegState(bool B) { in getDeadRegState() function
/external/llvm/lib/CodeGen/
DMachineInstrBundle.cpp204 MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) | in finalizeBundle()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/
DMachineInstrBundle.cpp206 MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) | in finalizeBundle()
/external/swiftshader/third_party/LLVM/lib/CodeGen/
DTargetInstrInfoImpl.cpp100 .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead)) in commuteInstruction()
/external/swiftshader/third_party/LLVM/lib/Target/PowerPC/
DPPCInstrInfo.cpp142 .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead)) in commuteInstruction()
/external/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp381 .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead)) in commuteInstructionImpl()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/
DPPCInstrInfo.cpp417 .addReg(Reg0, RegState::Define | getDeadRegState(Reg0IsDead)) in commuteInstructionImpl()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/
DX86InstrInfo.cpp879 .addReg(Dest, RegState::Define | getDeadRegState(isDead)) in convertToThreeAddressWithLEA()
5430 getDeadRegState(ImpOp.isDead()) | in unfoldMemoryOperand()

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