| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.td | 67 def i64immSExt32 : PatLeaf<(i64 imm),
159 [(BPFbrcc i64:$dst, i64immSExt32:$imm, Cond, bb:$BrDst)]> {
222 [(set GPR:$dst, (OpNode GPR:$src2, i64immSExt32:$imm))]>;
296 [(set GPR:$dst, (i64 i64immSExt32:$imm))]>;
495 … (BPFselectcc i64:$lhs, (i64immSExt32:$rhs), (i64 imm:$imm), i64:$src, i64:$src2))]>;
505 … (BPFselectcc i64:$lhs, (i64immSExt32:$rhs), (i64 imm:$imm), i32:$src, i32:$src2))]>;
606 [(set R0, (OpNode GPR:$skb, i64immSExt32:$imm))]> {
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.td | 53 def i64immSExt32 : PatLeaf<(imm),
106 [(BPFbrcc i64:$dst, i64immSExt32:$imm, Cond, bb:$BrDst)]> {
143 [(set GPR:$dst, (OpNode GPR:$src2, i64immSExt32:$imm))]> {
220 [(set GPR:$dst, (i64 i64immSExt32:$imm))]> {
532 [(set R0, (OpNode GPR:$skb, i64immSExt32:$imm))]> {
|
| /external/llvm/lib/Target/X86/ |
| D | X86InstrCompiler.td | 659 [(set EFLAGS, (Op addr:$dst, i64immSExt32:$src2))],
890 (atomic_load_64 addr:$dst), (i64immSExt32:$src)))]>;
984 [(atomic_store_64 addr:$dst, i64immSExt32:$src)]>;
1378 i64immSExt32:$src2))]>;
1418 // AddedComplexity is needed to give priority over i64immSExt8 and i64immSExt32.
1821 def : Pat<(add GR64:$src1, i64immSExt32:$src2),
1822 (ADD64ri32 GR64:$src1, i64immSExt32:$src2)>;
1833 def : Pat<(sub GR64:$src1, i64immSExt32:$src2),
1834 (SUB64ri32 GR64:$src1, i64immSExt32:$src2)>;
1843 def : Pat<(mul GR64:$src1, i64immSExt32:$src2),
[all …]
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| D | X86InstrArithmetic.td | 235 (X86smul_flag GR64:$src1, i64immSExt32:$src2))],
279 i64immSExt32:$src2))],
588 /// immediate of this kind in a pattern (e.g. imm, or i64immSExt32).
628 Imm32S, i64i32imm, i64immSExt32, i64i8imm, i64immSExt8,
|
| D | X86InstrInfo.td | 962 def i64immSExt32 : ImmLeaf<i64, [{ return isInt<32>(Imm); }]>;
1381 [(set GR64:$dst, i64immSExt32:$src)], IIC_MOV>;
1412 [(store i64immSExt32:$src, addr:$dst)], IIC_MOV_MEM>;
2372 i64immSExt32>, VEX_W;
2454 def : Pat<(X86bextr GR64:$src1, i64immSExt32:$src2),
2455 (BEXTRI64ri GR64:$src1, i64immSExt32:$src2)>;
2456 def : Pat<(X86bextr (loadi64 addr:$src1), i64immSExt32:$src2),
2457 (BEXTRI64mi addr:$src1, i64immSExt32:$src2)>;
|
| D | X86ISelDAGToDAG.cpp | 190 inline bool i64immSExt32(SDNode *N) const { in i64immSExt32() function in __anonfec1f42b0311::X86DAGToDAGISel
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
| D | X86InstrCompiler.td | 673 [(set EFLAGS, (Op addr:$dst, i64immSExt32:$src2))]>,
912 (atomic_load_64 addr:$dst), (i64immSExt32:$src)))]>;
1007 [(atomic_store_64 addr:$dst, i64immSExt32:$src)]>;
1363 i64immSExt32:$src2))]>;
1402 def : Pat<(sub_is_xor i64immSExt32:$src2, GR64:$src1),
1403 (XOR64ri32 GR64:$src1, i64immSExt32:$src2)>;
1441 // AddedComplexity is needed to give priority over i64immSExt8 and i64immSExt32.
1874 def : Pat<(add GR64:$src1, i64immSExt32:$src2),
1875 (ADD64ri32 GR64:$src1, i64immSExt32:$src2)>;
1906 def : Pat<(sub GR64:$src1, i64immSExt32:$src2),
[all …]
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| D | X86InstrArithmetic.td | 227 (X86smul_flag GR64:$src1, i64immSExt32:$src2))]>,
268 i64immSExt32:$src2))]>,
562 /// immediate of this kind in a pattern (e.g. imm, or i64immSExt32).
|
| D | X86InstrInfo.td | 993 def i64immSExt32 : ImmLeaf<i64, [{ return isInt<32>(Imm); }]>;
1030 def i64immSExt32_su : PatLeaf<(i64immSExt32), [{
1506 [(set GR64:$dst, i64immSExt32:$src)]>;
2630 i64immSExt32, WriteBEXTR>, VEX_W;
|
| /external/swiftshader/third_party/LLVM/lib/Target/X86/ |
| D | X86InstrCompiler.td | 1164 i64immSExt32:$src2))]>;
1601 def : Pat<(add GR64:$src1, i64immSExt32:$src2),
1602 (ADD64ri32 GR64:$src1, i64immSExt32:$src2)>;
1613 def : Pat<(sub GR64:$src1, i64immSExt32:$src2),
1614 (SUB64ri32 GR64:$src1, i64immSExt32:$src2)>;
1623 def : Pat<(mul GR64:$src1, i64immSExt32:$src2),
1624 (IMUL64rri32 GR64:$src1, i64immSExt32:$src2)>;
1627 def : Pat<(mul (loadi64 addr:$src1), i64immSExt32:$src2),
1628 (IMUL64rmi32 addr:$src1, i64immSExt32:$src2)>;
1672 def : Pat<(or GR64:$src1, i64immSExt32:$src2),
[all …]
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| D | X86ISelDAGToDAG.cpp | 181 inline bool i64immSExt32(SDNode *N) const { in i64immSExt32() function in __anon4c55d6570311::X86DAGToDAGISel
1462 else if (i64immSExt32(Val.getNode())) in SelectAtomicLoadAdd()
1470 else if (i64immSExt32(Val.getNode())) in SelectAtomicLoadAdd()
1630 else if (i64immSExt32(Val.getNode())) in SelectAtomicLoadArith()
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| D | X86InstrArithmetic.td | 194 (X86smul_flag GR64:$src1, i64immSExt32:$src2))]>;
231 i64immSExt32:$src2))]>;
540 /// immediate of this kind in a pattern (e.g. imm, or i64immSExt32).
579 Imm32, i64i32imm, i64immSExt32, i64i8imm, i64immSExt8,
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| D | X86InstrInfo.td | 549 def i64immSExt32 : ImmLeaf<i64, [{ return Imm == (int32_t)Imm; }]>;
869 [(set GR64:$dst, i64immSExt32:$src)]>;
883 [(store i64immSExt32:$src, addr:$dst)]>;
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| /external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
| D | SystemZOperands.td | 193 def i64immSExt32 : PatLeaf<(i64 imm), [{
194 // i64immSExt32 predicate - True if the 64-bit immediate fits in a 32-bit
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| D | SystemZInstrInfo.td | 872 [(set GR64:$dst, (mul GR64:$src1, i64immSExt32:$src2))]>,
998 [(set PSW, (SystemZcmp GR64:$src1, i64immSExt32:$src2))]>;
|