/art/compiler/dex/quick/x86/ |
D | utility_x86.cc | 394 int displacement = SRegOffset(rl_dest.s_reg_low); in OpMemReg() local 423 int displacement = SRegOffset(rl_value.s_reg_low); in OpRegMem() local 635 int displacement, RegStorage r_dest, OpSize size) { in LoadBaseIndexedDisp() 766 LIR* X86Mir2Lir::LoadBaseDisp(RegStorage r_base, int displacement, RegStorage r_dest, in LoadBaseDisp() 782 int displacement, RegStorage r_src, OpSize size) { in StoreBaseIndexedDisp() 870 LIR* X86Mir2Lir::StoreBaseDisp(RegStorage r_base, int displacement, RegStorage r_src, OpSize size, in StoreBaseDisp()
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D | fp_x86.cc | 160 int displacement = is_double ? dest_v_reg_offset + LOWORD_OFFSET : dest_v_reg_offset; in GenLongToFP() local 418 int displacement = dest_v_reg_offset + LOWORD_OFFSET; in GenRemFP() local 628 int displacement = SRegOffset(rl_dest.s_reg_low); in GenInlinedAbsFloat() local 692 int displacement = SRegOffset(rl_dest.s_reg_low); in GenInlinedAbsDouble() local
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D | int_x86.cc | 1275 void X86Mir2Lir::GenImulMemImm(RegStorage dest, int sreg, int displacement, int val) { in GenImulMemImm() 1408 int displacement = SRegOffset(rl_src1.s_reg_low); in GenMulLongConst() local 1511 int displacement = SRegOffset(rl_src2.s_reg_low); in GenMulLong() local 1533 int displacement = SRegOffset(rl_src1.s_reg_low); in GenMulLong() local 1544 int displacement = SRegOffset(rl_src2.s_reg_low); in GenMulLong() local 1567 int displacement = SRegOffset(rl_src1.s_reg_low); in GenMulLong() local 1612 int displacement = SRegOffset(rl_src.s_reg_low); in GenLongRegOrMemOp() local 1647 int displacement = SRegOffset(rl_dest.s_reg_low); in GenLongArith() local 2484 int displacement = SRegOffset(rl_dest.s_reg_low); in GenLongImm() local 2515 int displacement = SRegOffset(rl_dest.s_reg_low); in GenLongImm() local [all …]
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D | call_x86.cc | 292 int displacement = SRegOffset(base_of_code_->s_reg_low); in GenEntrySequence() local
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D | assemble_x86.cc | 613 int32_t raw_base, int32_t displacement) { in ComputeSize() 1325 int32_t displacement, int32_t raw_cl) { in EmitShiftMemCl()
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D | target_x86.cc | 917 int displacement = SRegOffset(rl_dest.s_reg_low); in GenConstWide() local 1359 int displacement = SRegOffset(rl_start.s_reg_low) + sizeof(uint32_t); in GenInlinedIndexOf() local 2268 int displacement = SRegOffset(rl_result.s_reg_low); in GenReduceVector() local
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/art/compiler/dex/quick/mips/ |
D | utility_mips.cc | 455 LIR* MipsMir2Lir::LoadBaseDispBody(RegStorage r_base, int displacement, RegStorage r_dest, in LoadBaseDispBody() 552 LIR* MipsMir2Lir::LoadBaseDisp(RegStorage r_base, int displacement, RegStorage r_dest, in LoadBaseDisp() 574 LIR* MipsMir2Lir::StoreBaseDispBody(RegStorage r_base, int displacement, in StoreBaseDispBody() 655 LIR* MipsMir2Lir::StoreBaseDisp(RegStorage r_base, int displacement, RegStorage r_src, in StoreBaseDisp()
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D | target_mips.cc | 495 LIR* MipsMir2Lir::GenAtomic64Load(RegStorage r_base, int displacement, RegStorage r_dest) { in GenAtomic64Load() 509 LIR* MipsMir2Lir::GenAtomic64Store(RegStorage r_base, int displacement, RegStorage r_src) { in GenAtomic64Store()
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/art/compiler/dex/quick/arm/ |
D | utility_arm.cc | 825 int displacement, RegStorage r_src_dest, in LoadStoreUsingInsnWithOffsetImm8Shl2() 854 LIR* ArmMir2Lir::LoadBaseDispBody(RegStorage r_base, int displacement, RegStorage r_dest, in LoadBaseDispBody() 965 LIR* ArmMir2Lir::LoadBaseDisp(RegStorage r_base, int displacement, RegStorage r_dest, in LoadBaseDisp() 995 LIR* ArmMir2Lir::StoreBaseDispBody(RegStorage r_base, int displacement, RegStorage r_src, in StoreBaseDispBody() 1087 LIR* ArmMir2Lir::StoreBaseDisp(RegStorage r_base, int displacement, RegStorage r_src, in StoreBaseDisp()
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/art/compiler/dex/quick/arm64/ |
D | utility_arm64.cc | 1197 LIR* Arm64Mir2Lir::LoadBaseDispBody(RegStorage r_base, int displacement, RegStorage r_dest, in LoadBaseDispBody() 1274 LIR* Arm64Mir2Lir::LoadBaseDisp(RegStorage r_base, int displacement, RegStorage r_dest, in LoadBaseDisp() 1289 LIR* Arm64Mir2Lir::LoadRefDisp(RegStorage r_base, int displacement, RegStorage r_dest, in LoadRefDisp() 1294 LIR* Arm64Mir2Lir::StoreBaseDispBody(RegStorage r_base, int displacement, RegStorage r_src, in StoreBaseDispBody() 1365 LIR* Arm64Mir2Lir::StoreBaseDisp(RegStorage r_base, int displacement, RegStorage r_src, in StoreBaseDisp() 1387 LIR* Arm64Mir2Lir::StoreRefDisp(RegStorage r_base, int displacement, RegStorage r_src, in StoreRefDisp()
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/art/compiler/utils/x86_64/ |
D | assembler_x86_64_test.cc | 265 ssize_t displacement = static_cast<ssize_t>(frame_size) - (spill_regs.size() * 8 + 8); in buildframe_test_fn() local 295 ssize_t displacement = static_cast<ssize_t>(frame_size) - spill_regs.size() * 8 - 8; in removeframe_test_fn() local
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/art/compiler/dex/quick/ |
D | mir_to_lir.h | 995 virtual LIR* LoadWordDisp(RegStorage r_base, int displacement, RegStorage r_dest) { in LoadWordDisp() 999 virtual LIR* Load32Disp(RegStorage r_base, int displacement, RegStorage r_dest) { in Load32Disp() 1003 virtual LIR* LoadRefDisp(RegStorage r_base, int displacement, RegStorage r_dest, in LoadRefDisp() 1027 virtual LIR* StoreWordDisp(RegStorage r_base, int displacement, RegStorage r_src) { in StoreWordDisp() 1031 virtual LIR* StoreRefDisp(RegStorage r_base, int displacement, RegStorage r_src, in StoreRefDisp() 1041 virtual LIR* Store32Disp(RegStorage r_base, int displacement, RegStorage r_src) { in Store32Disp()
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/art/compiler/jni/quick/ |
D | calling_convention.h | 60 void ResetIterator(FrameOffset displacement) { in ResetIterator()
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/art/disassembler/ |
D | disassembler_x86.cc | 1221 int32_t displacement; in DumpInstruction() local
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/art/runtime/interpreter/ |
D | interpreter_goto_table_impl.cc | 2407 int32_t displacement = static_cast<int32_t>(found_dex_pc) - static_cast<int32_t>(dex_pc); in ExecuteGotoImpl() local
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