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Searched refs:base (Results 1 – 25 of 57) sorted by relevance

123

/art/compiler/utils/arm64/
Dassembler_arm64.cc93 Register base, int32_t offset) { in StoreWToOffset() argument
96 ___ Strb(reg_w(source), MEM_OP(reg_x(base), offset)); in StoreWToOffset()
99 ___ Strh(reg_w(source), MEM_OP(reg_x(base), offset)); in StoreWToOffset()
102 ___ Str(reg_w(source), MEM_OP(reg_x(base), offset)); in StoreWToOffset()
109 void Arm64Assembler::StoreToOffset(Register source, Register base, int32_t offset) { in StoreToOffset() argument
111 ___ Str(reg_x(source), MEM_OP(reg_x(base), offset)); in StoreToOffset()
114 void Arm64Assembler::StoreSToOffset(SRegister source, Register base, int32_t offset) { in StoreSToOffset() argument
115 ___ Str(reg_s(source), MEM_OP(reg_x(base), offset)); in StoreSToOffset()
118 void Arm64Assembler::StoreDToOffset(DRegister source, Register base, int32_t offset) { in StoreDToOffset() argument
119 ___ Str(reg_d(source), MEM_OP(reg_x(base), offset)); in StoreDToOffset()
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Dassembler_arm64.h130 void LoadRef(ManagedRegister dest, ManagedRegister base, MemberOffset offs) OVERRIDE;
131 void LoadRawPtr(ManagedRegister dest, ManagedRegister base, Offset offs) OVERRIDE;
185 void Call(ManagedRegister base, Offset offset, ManagedRegister scratch) OVERRIDE;
186 void Call(FrameOffset base, Offset offset, ManagedRegister scratch) OVERRIDE;
223 Register base, int32_t offset);
224 void StoreToOffset(Register source, Register base, int32_t offset);
225 void StoreSToOffset(SRegister source, Register base, int32_t offset);
226 void StoreDToOffset(DRegister source, Register base, int32_t offset);
231 Register base, int32_t offset);
232 void LoadFromOffset(Register dest, Register base, int32_t offset);
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/art/compiler/utils/x86/
Dassembler_x86.h67 Register base() const { in base() function
98 void SetSIB(ScaleFactor scale, Register index, Register base) { in SetSIB() argument
101 encoding_[1] = (scale << 6) | (index << 3) | base; in SetSIB()
138 Address(Register base, int32_t disp) { in Address() argument
139 Init(base, disp); in Address()
142 Address(Register base, Offset disp) { in Address() argument
143 Init(base, disp.Int32Value()); in Address()
146 Address(Register base, FrameOffset disp) { in Address() argument
147 CHECK_EQ(base, ESP); in Address()
151 Address(Register base, MemberOffset disp) { in Address() argument
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/art/compiler/utils/x86_64/
Dassembler_x86_64.h79 Register base() const { in base() function
118 void SetSIB(ScaleFactor scale, CpuRegister index, CpuRegister base) { in SetSIB() argument
121 if (base.NeedsRex()) { in SetSIB()
128 static_cast<uint8_t>(base.LowBits()); in SetSIB()
166 Address(CpuRegister base, int32_t disp) { in Address() argument
167 Init(base, disp); in Address()
170 Address(CpuRegister base, Offset disp) { in Address() argument
171 Init(base, disp.Int32Value()); in Address()
174 Address(CpuRegister base, FrameOffset disp) { in Address() argument
175 CHECK_EQ(base.AsRegister(), RSP); in Address()
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/art/test/017-float/
Dexpected.txt1 base values: d=3.1415926535 f=3.1415927
2 base values: d=3.1415926535 f=3.1415927
3 base values: f=3.1415927 d=3.1415926535
/art/compiler/dex/
Dlocal_value_numbering.h167 uint16_t base; // Or array. member
173 return base == other.base && type == other.type && field_id == other.field_id;
180 if (lhs.base != rhs.base) { in operator()
181 return lhs.base < rhs.base; in operator()
197 uint16_t base; member
202 return base == other.base && type == other.type;
209 if (lhs.base != rhs.base) { in operator()
210 return lhs.base < rhs.base; in operator()
302 void HandleEscapingRef(uint16_t base);
Dglobal_value_numbering.h141 uint16_t base; member
147 if (lhs.base != rhs.base) { in operator()
148 return lhs.base < rhs.base; in operator()
157 uint16_t GetArrayLocation(uint16_t base, uint16_t index);
161 return array_location_reverse_map_[location]->first.base; in GetArrayLocationBase()
Dlocal_value_numbering.cc71 uint16_t field_id, uint16_t base, uint16_t memory_version) { in LookupGlobalValue() argument
72 return gvn->LookupValue(kAliasingIFieldOp, field_id, base, memory_version); in LookupGlobalValue()
76 uint16_t field_id, uint16_t base) { in LookupMergeValue() argument
79 if (lvn->IsNonAliasingIField(base, field_id, type)) { in LookupMergeValue()
80 uint16_t loc = gvn->LookupValue(kNonAliasingIFieldLocOp, base, field_id, type); in LookupMergeValue()
87 gvn, lvn, &lvn->aliasing_ifield_value_map_, field_id, base); in LookupMergeValue()
103 uint16_t field_id, uint16_t base) { in LookupMergeLocationValue() argument
104 return gvn->LookupValue(kMergeBlockAliasingIFieldMergeLocationOp, field_id, base, lvn_id); in LookupMergeLocationValue()
637 if (entry.field_id == kNoValue && escaped_refs_.count(entry.base) != 0u) { in MergeEscapedIFieldTypeClobberSets()
646 hint->base == entry.base && hint->type == entry.type) && in MergeEscapedIFieldClobberSets()
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/art/test/106-exceptions2/src/
DMain.java134 Main base = new Main(); in nullCheckTestNoThrow() local
138 base.ifoo = x; in nullCheckTestNoThrow()
139 return base.noThrow(a,b,c); in nullCheckTestNoThrow()
143 Main base = new Main(); in nullCheckTestThrow() local
150 base.ifoo = x; in nullCheckTestThrow()
151 return base.checkThrow(a,b,c,d,e,f); in nullCheckTestThrow()
/art/compiler/utils/
Dassembler_test.h60 std::string base = fmt; in RepeatR() local
62 size_t reg_index = base.find("{reg}"); in RepeatR()
67 base.replace(reg_index, 5, reg_string); in RepeatR()
73 str += base; in RepeatR()
86 std::string base = fmt; in RepeatRR() local
88 size_t reg1_index = base.find("{reg1}"); in RepeatRR()
93 base.replace(reg1_index, 6, reg_string); in RepeatRR()
96 size_t reg2_index = base.find("{reg2}"); in RepeatRR()
101 base.replace(reg2_index, 6, reg_string); in RepeatRR()
107 str += base; in RepeatRR()
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/art/runtime/
DAndroid.mk24 base/allocator.cc \
25 base/bit_vector.cc \
26 base/hex_dump.cc \
27 base/logging.cc \
28 base/mutex.cc \
29 base/scoped_flock.cc \
30 base/stringpiece.cc \
31 base/stringprintf.cc \
32 base/timing_logger.cc \
33 base/unix_file/fd_file.cc \
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/art/runtime/arch/x86/
Dthread_x86.cc47 const uintptr_t base = reinterpret_cast<uintptr_t>(this); in InitCpu() local
64 entry.base0 = (base & 0x0000ffff); in InitCpu()
65 entry.base1 = (base & 0x00ff0000) >> 16; in InitCpu()
66 entry.base2 = (base & 0xff000000) >> 24; in InitCpu()
100 ldt_entry.base_addr = base; in InitCpu()
/art/compiler/utils/mips/
Dassembler_mips.cc477 void MipsAssembler::LoadFromOffset(LoadOperandType type, Register reg, Register base, in LoadFromOffset() argument
481 Lb(reg, base, offset); in LoadFromOffset()
484 Lbu(reg, base, offset); in LoadFromOffset()
487 Lh(reg, base, offset); in LoadFromOffset()
490 Lhu(reg, base, offset); in LoadFromOffset()
493 Lw(reg, base, offset); in LoadFromOffset()
503 void MipsAssembler::LoadSFromOffset(FRegister reg, Register base, int32_t offset) { in LoadSFromOffset() argument
504 Lwc1(reg, base, offset); in LoadSFromOffset()
507 void MipsAssembler::LoadDFromOffset(DRegister reg, Register base, int32_t offset) { in LoadDFromOffset() argument
508 Ldc1(reg, base, offset); in LoadDFromOffset()
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Dassembler_mips.h141 void LoadFromOffset(LoadOperandType type, Register reg, Register base, int32_t offset);
142 void LoadSFromOffset(FRegister reg, Register base, int32_t offset);
143 void LoadDFromOffset(DRegister reg, Register base, int32_t offset);
144 void StoreToOffset(StoreOperandType type, Register reg, Register base, int32_t offset);
145 void StoreFToOffset(FRegister reg, Register base, int32_t offset);
146 void StoreDToOffset(DRegister reg, Register base, int32_t offset);
195 void LoadRef(ManagedRegister mdest, ManagedRegister base, MemberOffset offs) OVERRIDE;
197 void LoadRawPtr(ManagedRegister mdest, ManagedRegister base, Offset offs) OVERRIDE;
262 void Call(ManagedRegister base, Offset offset, ManagedRegister mscratch) OVERRIDE;
263 void Call(FrameOffset base, Offset offset, ManagedRegister mscratch) OVERRIDE;
/art/compiler/utils/arm/
Dassembler_arm32.cc264 Register base, in ldm() argument
267 EmitMultiMemOp(cond, am, true, base, regs); in ldm()
272 Register base, in stm() argument
275 EmitMultiMemOp(cond, am, false, base, regs); in stm()
601 Register base, in EmitMultiMemOp() argument
603 CHECK_NE(base, kNoRegister); in EmitMultiMemOp()
609 (static_cast<int32_t>(base) << kRnShift) | in EmitMultiMemOp()
1327 Register base, in LoadFromOffset() argument
1331 CHECK(base != IP); in LoadFromOffset()
1333 add(IP, IP, ShifterOperand(base), cond); in LoadFromOffset()
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Dassembler_thumb2.cc318 Register base, in ldm() argument
333 ldr(static_cast<Register>(reg), Address(base, kRegisterSize, Address::PostIndex), cond); in ldm()
335 EmitMultiMemOp(cond, am, true, base, regs); in ldm()
341 Register base, in stm() argument
357 str(static_cast<Register>(reg), Address(base, -kRegisterSize, strmode), cond); in stm()
359 EmitMultiMemOp(cond, am, false, base, regs); in stm()
1410 Register base, in EmitMultiMemOp() argument
1412 CHECK_NE(base, kNoRegister); in EmitMultiMemOp()
1453 base << 16 | in EmitMultiMemOp()
1460 base << 8 | in EmitMultiMemOp()
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/art/build/
DAndroid.gtest.mk73 runtime/base/bit_field_test.cc \
74 runtime/base/bit_vector_test.cc \
75 runtime/base/hash_set_test.cc \
76 runtime/base/hex_dump_test.cc \
77 runtime/base/histogram_test.cc \
78 runtime/base/mutex_test.cc \
79 runtime/base/scoped_flock_test.cc \
80 runtime/base/stringprintf_test.cc \
81 runtime/base/timing_logger_test.cc \
82 runtime/base/unix_file/fd_file_test.cc \
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/art/compiler/dex/quick/arm64/
Dint_arm64.cc470 uint64_t base = DecodeLogicalImmediate(/*is_wide*/true, magic_table[lit].magic64_base); in SmallLiteralDivRem64() local
473 reconstructed_imm = base ^ eor; in SmallLiteralDivRem64()
475 reconstructed_imm = base + 1; in SmallLiteralDivRem64()
1420 static void SpillCoreRegs(Arm64Mir2Lir* m2l, RegStorage base, int offset, uint32_t reg_mask) { in SpillCoreRegs() argument
1427 m2l->NewLIR3(WIDE(kA64Str3rXD), RegStorage::Solo64(reg1).GetReg(), base.GetReg(), offset); in SpillCoreRegs()
1430 RegStorage::Solo64(reg1).GetReg(), base.GetReg(), offset); in SpillCoreRegs()
1436 static void SpillFPRegs(Arm64Mir2Lir* m2l, RegStorage base, int offset, uint32_t reg_mask) { in SpillFPRegs() argument
1443 m2l->NewLIR3(FWIDE(kA64Str3fXD), RegStorage::FloatSolo64(reg1).GetReg(), base.GetReg(), in SpillFPRegs()
1447 RegStorage::FloatSolo64(reg1).GetReg(), base.GetReg(), offset); in SpillFPRegs()
1452 static int SpillRegsPreSub(Arm64Mir2Lir* m2l, RegStorage base, uint32_t core_reg_mask, in SpillRegsPreSub() argument
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/art/test/003-omnibus-opcodes/src/
DMethodCall.java56 MethodCallBase base = inst; in run() local
57 base.tryThing(); in run()
/art/compiler/
Dcommon_compiler_test.cc147 const byte* base = reinterpret_cast<const byte*>(code); // Base of data points at code. in CreateOatMethod() local
148 base -= kPointerSize; // Move backward so that code_offset != 0. in CreateOatMethod()
150 return OatFile::OatMethod(base, code_offset); in CreateOatMethod()
249 uintptr_t base = RoundDown(data, kPageSize); in MakeExecutable() local
251 uintptr_t len = limit - base; in MakeExecutable()
252 int result = mprotect(reinterpret_cast<void*>(base), len, PROT_READ | PROT_WRITE | PROT_EXEC); in MakeExecutable()
258 __builtin___clear_cache(reinterpret_cast<void*>(base), reinterpret_cast<void*>(base + len)); in MakeExecutable()
/art/runtime/gc/space/
Ddlmalloc_space.h140 void* CreateAllocator(void* base, size_t morecore_start, size_t initial_size, in CreateAllocator() argument
142 return CreateMspace(base, morecore_start, initial_size); in CreateAllocator()
144 static void* CreateMspace(void* base, size_t morecore_start, size_t initial_size);
Drosalloc_space.h137 void* CreateAllocator(void* base, size_t morecore_start, size_t initial_size, in CreateAllocator() argument
139 return CreateRosAlloc(base, morecore_start, initial_size, maximum_size, low_memory_mode); in CreateAllocator()
141 static allocator::RosAlloc* CreateRosAlloc(void* base, size_t morecore_start, size_t initial_size,
/art/test/072-precise-gc/src/
DMain.java61 static String generateString(String base, int num) { in generateString() argument
62 return base + num; in generateString()
/art/test/065-mismatched-implements/src/
DIndirect.java25 Base base = new Base(); in main() local
/art/test/066-mismatched-super/src/
DIndirect.java25 Base base = new Base(); in main() local

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