| /art/compiler/dex/quick/arm64/ |
| D | utility_arm64.cc | 160 static int CountLeadingZeros(bool is_wide, uint64_t value) { in CountLeadingZeros() argument
161 return (is_wide) ? __builtin_clzll(value) : __builtin_clz((uint32_t)value); in CountLeadingZeros()
164 static int CountTrailingZeros(bool is_wide, uint64_t value) { in CountTrailingZeros() argument
165 return (is_wide) ? __builtin_ctzll(value) : __builtin_ctz((uint32_t)value); in CountTrailingZeros()
168 static int CountSetBits(bool is_wide, uint64_t value) { in CountSetBits() argument
169 return ((is_wide) ? in CountSetBits()
182 int Arm64Mir2Lir::EncodeLogicalImmediate(bool is_wide, uint64_t value) { in EncodeLogicalImmediate() argument
207 (!is_wide && (uint32_t)value == ~UINT32_C(0))) { in EncodeLogicalImmediate()
211 unsigned lead_zero = CountLeadingZeros(is_wide, value); in EncodeLogicalImmediate()
212 unsigned lead_one = CountLeadingZeros(is_wide, ~value); in EncodeLogicalImmediate()
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| D | target_arm64.cc | 260 static uint64_t RepeatBitsAcrossReg(bool is_wide, uint64_t value, unsigned width) { in RepeatBitsAcrossReg() argument
262 unsigned reg_size = (is_wide) ? 64 : 32; in RepeatBitsAcrossReg()
279 uint64_t Arm64Mir2Lir::DecodeLogicalImmediate(bool is_wide, int value) { in DecodeLogicalImmediate() argument
311 return RepeatBitsAcrossReg(is_wide, RotateRight(bits, imm_r & mask, width), width); in DecodeLogicalImmediate()
411 bool is_wide = IS_WIDE(lir->opcode); in BuildInsnString() local
412 uint64_t imm = DecodeLogicalImmediate(is_wide, operand); in BuildInsnString()
476 bool is_wide = IS_WIDE(lir->opcode); in BuildInsnString() local
478 snprintf(tbuf, arraysize(tbuf), "%c%d", (is_wide) ? 'x' : 'w', in BuildInsnString()
481 strcpy(tbuf, (is_wide) ? "xzr" : "wzr"); in BuildInsnString()
486 bool is_wide = IS_WIDE(lir->opcode); in BuildInsnString() local
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| D | codegen_arm64.h | 32 virtual RegStorage GetNextReg(bool is_double_or_float, bool is_wide, bool is_ref) = 0;
40 virtual RegStorage GetNextReg(bool is_double_or_float, bool is_wide, bool is_ref);
382 int EncodeLogicalImmediate(bool is_wide, uint64_t value);
383 uint64_t DecodeLogicalImmediate(bool is_wide, int value);
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| D | int_arm64.cc | 107 bool is_wide = rs_dest.Is64Bit(); in GenSelect() local
109 RegStorage zero_reg = is_wide ? rs_xzr : rs_wzr; in GenSelect()
140 if (is_wide) { in GenSelect()
171 NewLIR4(is_wide ? WIDE(opcode) : opcode, rs_dest.GetReg(), left_op.GetReg(), right_op.GetReg(), in GenSelect()
206 bool is_wide = rl_dest.ref || rl_dest.wide; in GenSelect() local
207 int opcode = is_wide ? WIDE(kA64Csel4rrrc) : kA64Csel4rrrc; in GenSelect()
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| /art/compiler/dex/ |
| D | vreg_analysis.cc | 82 bool MIRGraph::SetWide(int index, bool is_wide) { in SetWide() argument
84 if (is_wide && !reg_location_[index].wide) { in SetWide()
349 bool is_wide = rl_temp.wide || ((attrs & DF_A_WIDE) != 0); in InferTypeAndSize() local
356 is_wide |= rl_temp.wide; in InferTypeAndSize()
375 changed |= SetWide(defs[0], is_wide); in InferTypeAndSize()
385 changed |= SetWide(uses[i], is_wide); in InferTypeAndSize()
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| D | mir_graph.h | 955 bool SetWide(int index, bool is_wide);
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| /art/runtime/quick/ |
| D | inline_method_analyser.h | 125 uint16_t is_wide : 1; member
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| D | inline_method_analyser.cc | 159 data->is_wide = (return_opcode == Instruction::RETURN_WIDE) ? 1u : 0u; in AnalyseReturnMethod()
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| /art/compiler/dex/quick/ |
| D | dex_file_method_inliner.cc | 745 DCHECK_EQ(data.is_wide, 0u); in GenInlineReturnArg()
748 DCHECK_EQ(data.is_wide, 1u); in GenInlineReturnArg()
757 DCHECK_EQ(data.is_wide, 0u); in GenInlineReturnArg()
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| D | mir_to_lir.cc | 305 bool wide = (data.is_wide != 0u); in GenSpecialIdentity()
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| /art/compiler/dex/quick/x86/ |
| D | target_x86.cc | 2242 bool is_wide = false; in GenReduceVector() local
2262 if (is_wide == true) { in GenReduceVector()
2270 AnnotateDalvikRegAccess(l, displacement >> 2, true /* is_load */, is_wide /* is_64bit */); in GenReduceVector()
2271 AnnotateDalvikRegAccess(l, displacement >> 2, false /* is_load */, is_wide /* is_64bit */); in GenReduceVector()
2376 RegStorage X86Mir2Lir::InToRegStorageX86_64Mapper::GetNextReg(bool is_double_or_float, bool is_wide, in GetNextReg() argument
2388 return ml_->TargetReg(fpArgMappingToPhysicalReg[cur_fp_reg_++], is_wide ? kWide : kNotWide); in GetNextReg()
2393 is_ref ? kRef : (is_wide ? kWide : kNotWide)); in GetNextReg()
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| D | codegen_x86.h | 31 virtual RegStorage GetNextReg(bool is_double_or_float, bool is_wide, bool is_ref) = 0;
39 virtual RegStorage GetNextReg(bool is_double_or_float, bool is_wide, bool is_ref);
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