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Searched refs:mir (Results 1 – 25 of 41) sorted by relevance

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/art/compiler/dex/
Dmir_optimization.cc46 MIR* mir; in DoConstantPropagation() local
48 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) { in DoConstantPropagation()
50 if (mir->ssa_rep == nullptr) { in DoConstantPropagation()
54 uint64_t df_attributes = GetDataFlowAttributes(mir); in DoConstantPropagation()
56 MIR::DecodedInstruction* d_insn = &mir->dalvikInsn; in DoConstantPropagation()
68 SetConstant(mir->ssa_rep->defs[0], vB); in DoConstantPropagation()
71 SetConstant(mir->ssa_rep->defs[0], vB << 16); in DoConstantPropagation()
75 SetConstantWide(mir->ssa_rep->defs[0], static_cast<int64_t>(vB)); in DoConstantPropagation()
78 SetConstantWide(mir->ssa_rep->defs[0], d_insn->vB_wide); in DoConstantPropagation()
81 SetConstantWide(mir->ssa_rep->defs[0], static_cast<int64_t>(vB) << 48); in DoConstantPropagation()
[all …]
Dlocal_value_numbering.cc464 const MIR* mir = fall_through_bb->first_mir_insn; in PruneNonAliasingRefsForCatch() local
465 DCHECK(mir != nullptr); in PruneNonAliasingRefsForCatch()
467 if ((Instruction::FlagsOf(mir->dalvikInsn.opcode) & Instruction::kInvoke) != 0) { in PruneNonAliasingRefsForCatch()
468 for (uint16_t i = 0u; i != mir->ssa_rep->num_uses; ++i) { in PruneNonAliasingRefsForCatch()
469 uint16_t value_name = lvn->GetOperandValue(mir->ssa_rep->uses[i]); in PruneNonAliasingRefsForCatch()
933 uint16_t LocalValueNumbering::MarkNonAliasingNonNull(MIR* mir) { in MarkNonAliasingNonNull() argument
934 uint16_t res = GetOperandValue(mir->ssa_rep->defs[0]); in MarkNonAliasingNonNull()
975 void LocalValueNumbering::HandleNullCheck(MIR* mir, uint16_t reg) { in HandleNullCheck() argument
980 LOG(INFO) << "Removing null check for 0x" << std::hex << mir->offset; in HandleNullCheck()
982 mir->optimization_flags |= MIR_IGNORE_NULL_CHECK; in HandleNullCheck()
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Dmir_dataflow.cc927 MIR* mir; in FindLocalLiveIn() local
939 for (mir = bb->first_mir_insn; mir != NULL; mir = mir->next) { in FindLocalLiveIn()
940 uint64_t df_attributes = GetDataFlowAttributes(mir); in FindLocalLiveIn()
941 MIR::DecodedInstruction* d_insn = &mir->dalvikInsn; in FindLocalLiveIn()
980 HandleExtended(use_v, def_v, live_in_v, mir->dalvikInsn); in FindLocalLiveIn()
1017 void MIRGraph::AllocateSSAUseData(MIR *mir, int num_uses) { in AllocateSSAUseData() argument
1018 mir->ssa_rep->num_uses = num_uses; in AllocateSSAUseData()
1020 if (mir->ssa_rep->num_uses_allocated < num_uses) { in AllocateSSAUseData()
1021 … mir->ssa_rep->uses = static_cast<int*>(arena_->Alloc(sizeof(int) * num_uses, kArenaAllocDFInfo)); in AllocateSSAUseData()
1023 …mir->ssa_rep->fp_use = static_cast<bool*>(arena_->Alloc(sizeof(bool) * num_uses, kArenaAllocDFInfo… in AllocateSSAUseData()
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Dmir_graph.cc866 uint64_t MIRGraph::GetDataFlowAttributes(MIR* mir) { in GetDataFlowAttributes() argument
867 DCHECK(mir != nullptr); in GetDataFlowAttributes()
868 Instruction::Code opcode = mir->dalvikInsn.opcode; in GetDataFlowAttributes()
911 const MIR* mir; in DumpCFG() local
914 for (mir = bb->first_mir_insn; mir; mir = mir->next) { in DumpCFG()
915 int opcode = mir->dalvikInsn.opcode; in DumpCFG()
918 fprintf(file, " {%04x %s %d %d %d %d %d %d\\l}%s\\\n", mir->offset, in DumpCFG()
920 mir->dalvikInsn.vA, in DumpCFG()
921 mir->dalvikInsn.vB, in DumpCFG()
922 mir->dalvikInsn.arg[0], in DumpCFG()
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Dmir_analysis.cc904 for (MIR* mir = tbb->first_mir_insn; mir != NULL; mir = mir->next) { in AnalyzeBlock() local
905 if (MIR::DecodedInstruction::IsPseudoMirOp(mir->dalvikInsn.opcode)) { in AnalyzeBlock()
909 uint32_t flags = analysis_attributes_[mir->dalvikInsn.opcode]; in AnalyzeBlock()
1124 for (MIR* mir = bb->first_mir_insn; mir != nullptr; mir = mir->next) { in DoCacheFieldLoweringInfo() local
1125 if (mir->dalvikInsn.opcode >= Instruction::IGET && in DoCacheFieldLoweringInfo()
1126 mir->dalvikInsn.opcode <= Instruction::SPUT_SHORT) { in DoCacheFieldLoweringInfo()
1127 const Instruction* insn = Instruction::At(current_code_item_->insns_ + mir->offset); in DoCacheFieldLoweringInfo()
1131 if (mir->dalvikInsn.opcode <= Instruction::IPUT_SHORT) { in DoCacheFieldLoweringInfo()
1138 mir->meta.ifield_lowering_info = i - 1; in DoCacheFieldLoweringInfo()
1140 mir->meta.ifield_lowering_info = ifield_pos; in DoCacheFieldLoweringInfo()
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Dmir_graph.h418 void AppendMIR(MIR* mir);
421 void PrependMIR(MIR* mir);
426 MIR* FindPreviousMIR(MIR* mir);
429 bool RemoveMIR(MIR* mir);
532 MIR* mir; member
662 const MirIFieldLoweringInfo& GetIFieldLoweringInfo(MIR* mir) const { in GetIFieldLoweringInfo() argument
663 DCHECK_LT(mir->meta.ifield_lowering_info, ifield_lowering_infos_.Size()); in GetIFieldLoweringInfo()
664 return ifield_lowering_infos_.GetRawStorage()[mir->meta.ifield_lowering_info]; in GetIFieldLoweringInfo()
667 const MirSFieldLoweringInfo& GetSFieldLoweringInfo(MIR* mir) const { in GetSFieldLoweringInfo() argument
668 DCHECK_LT(mir->meta.sfield_lowering_info, sfield_lowering_infos_.Size()); in GetSFieldLoweringInfo()
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Dpost_opt_passes.cc59 MIR* mir = bb->first_mir_insn; in Worker() local
61 while (mir != nullptr) { in Worker()
62 MIR* next = mir->next; in Worker()
64 Instruction::Code opcode = mir->dalvikInsn.opcode; in Worker()
67 bb->RemoveMIR(mir); in Worker()
70 mir = next; in Worker()
Dlocal_value_numbering.h77 uint16_t GetValueNumber(MIR* mir);
295 uint16_t MarkNonAliasingNonNull(MIR* mir);
299 void HandleNullCheck(MIR* mir, uint16_t reg);
300 void HandleRangeCheck(MIR* mir, uint16_t array, uint16_t index);
301 void HandlePutObject(MIR* mir);
303 uint16_t HandlePhi(MIR* mir);
304 uint16_t HandleAGet(MIR* mir, uint16_t opcode);
305 void HandleAPut(MIR* mir, uint16_t opcode);
306 uint16_t HandleIGet(MIR* mir, uint16_t opcode);
307 void HandleIPut(MIR* mir, uint16_t opcode);
[all …]
Dvreg_analysis.cc124 bool MIRGraph::InferTypeAndSize(BasicBlock* bb, MIR* mir, bool changed) { in InferTypeAndSize() argument
125 SSARepresentation *ssa_rep = mir->ssa_rep; in InferTypeAndSize()
137 uint64_t attrs = GetDataFlowAttributes(mir); in InferTypeAndSize()
218 if ((mir->dalvikInsn.opcode == Instruction::RETURN) || in InferTypeAndSize()
219 (mir->dalvikInsn.opcode == Instruction::RETURN_WIDE) || in InferTypeAndSize()
220 (mir->dalvikInsn.opcode == Instruction::RETURN_OBJECT)) { in InferTypeAndSize()
253 Instruction::Code opcode = mir->dalvikInsn.opcode; in InferTypeAndSize()
255 0 : Instruction::FlagsOf(mir->dalvikInsn.opcode); in InferTypeAndSize()
259 int target_idx = mir->dalvikInsn.vB; in InferTypeAndSize()
263 MIR* move_result_mir = FindMoveResult(bb, mir); in InferTypeAndSize()
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Dlocal_value_numbering_test.cc138 MIR* mir = &mirs_[i]; in DoPrepareMIRs() local
139 mir->dalvikInsn.opcode = def->opcode; in DoPrepareMIRs()
140 mir->dalvikInsn.vB = static_cast<int32_t>(def->value); in DoPrepareMIRs()
141 mir->dalvikInsn.vB_wide = def->value; in DoPrepareMIRs()
144 mir->meta.ifield_lowering_info = def->field_info; in DoPrepareMIRs()
147 mir->meta.sfield_lowering_info = def->field_info; in DoPrepareMIRs()
149 mir->ssa_rep = &ssa_reps_[i]; in DoPrepareMIRs()
150 mir->ssa_rep->num_uses = def->num_uses; in DoPrepareMIRs()
151 mir->ssa_rep->uses = const_cast<int32_t*>(def->uses); // Not modified by LVN. in DoPrepareMIRs()
152 mir->ssa_rep->fp_use = nullptr; // Not used by LVN. in DoPrepareMIRs()
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Dssa_transformation.cc549 for (MIR* mir = bb->first_mir_insn; mir != NULL; mir = mir->next) { in InsertPhiNodeOperands() local
550 if (mir->dalvikInsn.opcode != static_cast<Instruction::Code>(kMirOpPhi)) in InsertPhiNodeOperands()
552 int ssa_reg = mir->ssa_rep->defs[0]; in InsertPhiNodeOperands()
559 AllocateSSAUseData(mir, num_uses); in InsertPhiNodeOperands()
560 int* uses = mir->ssa_rep->uses; in InsertPhiNodeOperands()
564 mir->meta.phi_incoming = incoming; in InsertPhiNodeOperands()
Dglobal_value_numbering_test.cc237 MIR* mir = &mirs_[i]; in DoPrepareMIRs() local
240 bb->AppendMIR(mir); in DoPrepareMIRs()
241 mir->dalvikInsn.opcode = def->opcode; in DoPrepareMIRs()
242 mir->dalvikInsn.vB = static_cast<int32_t>(def->value); in DoPrepareMIRs()
243 mir->dalvikInsn.vB_wide = def->value; in DoPrepareMIRs()
246 mir->meta.ifield_lowering_info = def->field_info; in DoPrepareMIRs()
249 mir->meta.sfield_lowering_info = def->field_info; in DoPrepareMIRs()
251 mir->meta.phi_incoming = static_cast<BasicBlockId*>( in DoPrepareMIRs()
254 mir->meta.phi_incoming[i] = bb->predecessors->Get(i); in DoPrepareMIRs()
257 mir->ssa_rep = &ssa_reps_[i]; in DoPrepareMIRs()
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Dmir_optimization_test.cc162 MIR* mir = &mirs_[i]; in DoPrepareMIRs() local
163 mir->dalvikInsn.opcode = def->opcode; in DoPrepareMIRs()
166 bb->AppendMIR(mir); in DoPrepareMIRs()
169 mir->meta.sfield_lowering_info = def->field_or_method_info; in DoPrepareMIRs()
171 mir->ssa_rep = nullptr; in DoPrepareMIRs()
172 mir->offset = 2 * i; // All insns need to be at least 2 code units long. in DoPrepareMIRs()
173 mir->optimization_flags = 0u; in DoPrepareMIRs()
/art/compiler/dex/quick/
Dmir_to_lir.cc228 bool Mir2Lir::GenSpecialIGet(MIR* mir, const InlineMethod& special) { in GenSpecialIGet() argument
241 GenPrintLabel(mir); in GenSpecialIGet()
268 bool Mir2Lir::GenSpecialIPut(MIR* mir, const InlineMethod& special) { in GenSpecialIPut() argument
285 GenPrintLabel(mir); in GenSpecialIPut()
303 bool Mir2Lir::GenSpecialIdentity(MIR* mir, const InlineMethod& special) { in GenSpecialIdentity() argument
308 GenPrintLabel(mir); in GenSpecialIdentity()
319 bool Mir2Lir::GenSpecialCase(BasicBlock* bb, MIR* mir, const InlineMethod& special) { in GenSpecialCase() argument
321 current_dalvik_offset_ = mir->offset; in GenSpecialCase()
328 DCHECK_EQ(mir->dalvikInsn.opcode, Instruction::RETURN_VOID); in GenSpecialCase()
329 return_mir = mir; in GenSpecialCase()
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Dmir_to_lir.h851 void GenSput(MIR* mir, RegLocation rl_src,
853 void GenSget(MIR* mir, RegLocation rl_dest,
855 void GenIGet(MIR* mir, int opt_flags, OpSize size,
857 void GenIPut(MIR* mir, int opt_flags, OpSize size,
1086 void CompileDalvikInstruction(MIR* mir, BasicBlock* bb, LIR* label_list);
1087 virtual void HandleExtendedMethodMIR(BasicBlock* bb, MIR* mir);
1323 virtual void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, bool is_double) = 0;
1324 virtual void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir) = 0;
1332 virtual void GenMachineSpecificExtendedMethodMIR(BasicBlock* bb, MIR* mir);
1339 virtual void GenSelect(BasicBlock* bb, MIR* mir) = 0;
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/art/test/126-miranda-multidex/src/
DMain.java24 MirandaClass mir = new MirandaClass(); in main() local
26 System.out.println(" inInterface: " + mir.inInterface()); in main()
27 System.out.println(" inInterface2: " + mir.inInterface2()); in main()
28 System.out.println(" inAbstract: " + mir.inAbstract()); in main()
31 MirandaAbstract mira = mir; in main()
/art/test/040-miranda/src/
DMain.java24 MirandaClass mir = new MirandaClass(); in main() local
26 System.out.println(" inInterface: " + mir.inInterface()); in main()
27 System.out.println(" inInterface2: " + mir.inInterface2()); in main()
28 System.out.println(" inAbstract: " + mir.inAbstract()); in main()
31 MirandaAbstract mira = mir; in main()
/art/compiler/dex/quick/x86/
Dtarget_x86.cc1685 void X86Mir2Lir::GenMachineSpecificExtendedMethodMIR(BasicBlock* bb, MIR* mir) { in GenMachineSpecificExtendedMethodMIR() argument
1686 switch (static_cast<ExtendedMIROpcode>(mir->dalvikInsn.opcode)) { in GenMachineSpecificExtendedMethodMIR()
1688 ReserveVectorRegisters(mir); in GenMachineSpecificExtendedMethodMIR()
1694 GenConst128(bb, mir); in GenMachineSpecificExtendedMethodMIR()
1697 GenMoveVector(bb, mir); in GenMachineSpecificExtendedMethodMIR()
1700 GenMultiplyVector(bb, mir); in GenMachineSpecificExtendedMethodMIR()
1703 GenAddVector(bb, mir); in GenMachineSpecificExtendedMethodMIR()
1706 GenSubtractVector(bb, mir); in GenMachineSpecificExtendedMethodMIR()
1709 GenShiftLeftVector(bb, mir); in GenMachineSpecificExtendedMethodMIR()
1712 GenSignedShiftRightVector(bb, mir); in GenMachineSpecificExtendedMethodMIR()
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Dcodegen_x86.h237 void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, bool is_double) OVERRIDE;
238 void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir) OVERRIDE;
239 void GenSelect(BasicBlock* bb, MIR* mir) OVERRIDE;
249 void GenLargePackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) OVERRIDE;
250 void GenLargeSparseSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src) OVERRIDE;
482 void GenMultiplyVectorSignedByte(BasicBlock *bb, MIR *mir);
483 void GenShiftByteVector(BasicBlock *bb, MIR *mir);
486 void AppendOpcodeWithConst(X86OpCode opcode, int reg, MIR* mir);
529 void ReserveVectorRegisters(MIR* mir);
544 void GenConst128(BasicBlock* bb, MIR* mir);
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Dutility_x86.cc928 for (MIR *mir = bb->first_mir_insn; mir != NULL; mir = mir->next) { in AnalyzeBB() local
929 int opcode = mir->dalvikInsn.opcode; in AnalyzeBB()
931 AnalyzeExtendedMIR(opcode, bb, mir); in AnalyzeBB()
933 AnalyzeMIR(opcode, bb, mir); in AnalyzeBB()
939 void X86Mir2Lir::AnalyzeExtendedMIR(int opcode, BasicBlock * bb, MIR *mir) { in AnalyzeExtendedMIR() argument
944 AnalyzeFPInstruction(opcode, bb, mir); in AnalyzeExtendedMIR()
955 void X86Mir2Lir::AnalyzeMIR(int opcode, BasicBlock * bb, MIR *mir) { in AnalyzeMIR() argument
974 AnalyzeFPInstruction(opcode, bb, mir); in AnalyzeMIR()
983 AnalyzeInvokeStatic(opcode, bb, mir); in AnalyzeMIR()
991 void X86Mir2Lir::AnalyzeFPInstruction(int opcode, BasicBlock * bb, MIR *mir) { in AnalyzeFPInstruction() argument
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/art/compiler/dex/portable/
Dmir_to_gbc.cc329 void MirConverter::ConvertCompareAndBranch(BasicBlock* bb, MIR* mir, in ConvertCompareAndBranch() argument
331 if (mir_graph_->GetBasicBlock(bb->taken)->start_offset <= mir->offset) { in ConvertCompareAndBranch()
345 MIR* mir, ConditionCode cc, RegLocation rl_src1) { in ConvertCompareZeroAndBranch() argument
346 if (mir_graph_->GetBasicBlock(bb->taken)->start_offset <= mir->offset) { in ConvertCompareZeroAndBranch()
467 void MirConverter::ConvertInvoke(BasicBlock* bb, MIR* mir, in ConvertInvoke() argument
469 CallInfo* info = mir_graph_->NewMemCallInfo(bb, mir, invoke_type, is_range); in ConvertInvoke()
703 bool MirConverter::ConvertMIRNode(MIR* mir, BasicBlock* bb, in ConvertMIRNode() argument
708 Instruction::Code opcode = mir->dalvikInsn.opcode; in ConvertMIRNode()
710 uint32_t vB = mir->dalvikInsn.vB; in ConvertMIRNode()
711 uint32_t vC = mir->dalvikInsn.vC; in ConvertMIRNode()
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Dmir_to_gbc.h117 void ConvertCompareAndBranch(BasicBlock* bb, MIR* mir, ConditionCode cc,
119 void ConvertCompareZeroAndBranch(BasicBlock* bb, MIR* mir, ConditionCode cc,
135 void ConvertInvoke(BasicBlock* bb, MIR* mir, InvokeType invoke_type,
168 bool ConvertMIRNode(MIR* mir, BasicBlock* bb, ::llvm::BasicBlock* llvm_bb);
172 void ConvertExtendedMIR(BasicBlock* bb, MIR* mir, ::llvm::BasicBlock* llvm_bb);
/art/compiler/dex/quick/mips/
Dcodegen_mips.h119 void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, bool is_double);
120 void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir);
121 void GenSelect(BasicBlock* bb, MIR* mir);
131 void GenLargePackedSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src);
132 void GenLargeSparseSwitch(MIR* mir, uint32_t table_offset, RegLocation rl_src);
133 bool GenSpecialCase(BasicBlock* bb, MIR* mir, const InlineMethod& special);
/art/compiler/dex/quick/arm/
Dfp_arm.cc214 void ArmMir2Lir::GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, in GenFusedFPCmpBranch() argument
220 rl_src1 = mir_graph_->GetSrcWide(mir, 0); in GenFusedFPCmpBranch()
221 rl_src2 = mir_graph_->GetSrcWide(mir, 2); in GenFusedFPCmpBranch()
226 rl_src1 = mir_graph_->GetSrc(mir, 0); in GenFusedFPCmpBranch()
227 rl_src2 = mir_graph_->GetSrc(mir, 1); in GenFusedFPCmpBranch()
233 ConditionCode ccode = mir->meta.ccode; in GenFusedFPCmpBranch()
Dcodegen_arm.h120 void GenFusedFPCmpBranch(BasicBlock* bb, MIR* mir, bool gt_bias, bool is_double);
121 void GenFusedLongCmpBranch(BasicBlock* bb, MIR* mir);
122 void GenSelect(BasicBlock* bb, MIR* mir);
134 void GenLargePackedSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src);
135 void GenLargeSparseSwitch(MIR* mir, DexOffset table_offset, RegLocation rl_src);

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