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Searched refs:COPY_TO_REGCLASS (Results 1 – 25 of 28) sorted by relevance

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/external/llvm/lib/Target/X86/
DX86InstrAVX512.td548 (v4i1 (COPY_TO_REGCLASS GR8:$mask, VK4WM)),
556 (v4i1 (COPY_TO_REGCLASS GR8:$mask, VK4WM)),
684 (COPY_TO_REGCLASS SrcRC_s:$src, SrcRC_v))>;
690 (COPY_TO_REGCLASS SrcRC_s:$src, SrcRC_v))>;
695 (COPY_TO_REGCLASS SrcRC_s:$src, SrcRC_v))>;
771 (VPBROADCASTDrZrkz (COPY_TO_REGCLASS GR16:$mask, VK16WM), GR32:$src)>;
774 (VPBROADCASTQrZrkz (COPY_TO_REGCLASS GR8:$mask, VK8WM), GR64:$src)>;
857 (VBROADCASTSSZr (COPY_TO_REGCLASS FR32X:$src, VR128X))>;
859 (VBROADCASTSDZr (COPY_TO_REGCLASS FR64X:$src, VR128X))>;
865 (v16i32 (VPBROADCASTDZkrm (COPY_TO_REGCLASS VK8WM:$mask, VK16WM),
[all …]
DX86InstrFMA.td187 (COPY_TO_REGCLASS
189 (COPY_TO_REGCLASS $src2, FR32),
190 (COPY_TO_REGCLASS $src1, FR32),
191 (COPY_TO_REGCLASS $src3, FR32)),
195 (COPY_TO_REGCLASS
197 (COPY_TO_REGCLASS $src2, FR64),
198 (COPY_TO_REGCLASS $src1, FR64),
199 (COPY_TO_REGCLASS $src3, FR64)),
DX86InstrCompiler.td1267 (MOVZX32rr8 (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS GR32:$src1,
1274 (i16 (COPY_TO_REGCLASS GR16:$src1, GR16_ABCD)), sub_8bit)),
1310 (MOVSX32rr8 (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS GR32:$src,
1317 (i32 (COPY_TO_REGCLASS GR16:$src, GR16_ABCD)), sub_8bit))),
1349 (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS GR32:$src, GR32_ABCD)),
1353 (EXTRACT_SUBREG (i16 (COPY_TO_REGCLASS GR16:$src, GR16_ABCD)),
1371 (EXTRACT_SUBREG (i16 (COPY_TO_REGCLASS GR16:$src, GR16_ABCD)),
1375 (EXTRACT_SUBREG (i32 (COPY_TO_REGCLASS GR32:$src, GR32_ABCD)),
1381 (EXTRACT_SUBREG (i16 (COPY_TO_REGCLASS GR16:$src, GR16_ABCD)),
1386 (MOVZX32rr8 (EXTRACT_SUBREG (i16 (COPY_TO_REGCLASS GR16:$src,
[all …]
DX86InstrSSE.td336 (COPY_TO_REGCLASS (v4f32 VR128:$src), FR32)>;
338 (COPY_TO_REGCLASS (v2f64 VR128:$src), FR64)>;
376 (COPY_TO_REGCLASS FR32:$src, VR128)>;
378 (COPY_TO_REGCLASS FR32:$src, VR128)>;
381 (COPY_TO_REGCLASS FR64:$src, VR128)>;
383 (COPY_TO_REGCLASS FR64:$src, VR128)>;
625 (COPY_TO_REGCLASS (VMOVSSrm addr:$src), VR128)>;
627 (COPY_TO_REGCLASS (VMOVSSrm addr:$src), VR128)>;
629 (COPY_TO_REGCLASS (VMOVSSrm addr:$src), VR128)>;
634 (COPY_TO_REGCLASS (VMOVSDrm addr:$src), VR128)>;
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DX86InstrFPStack.td682 def : Pat<(f64 (fextend RFP32:$src)), (COPY_TO_REGCLASS RFP32:$src, RFP64)>,
684 def : Pat<(f80 (fextend RFP32:$src)), (COPY_TO_REGCLASS RFP32:$src, RFP80)>,
686 def : Pat<(f80 (fextend RFP64:$src)), (COPY_TO_REGCLASS RFP64:$src, RFP80)>,
692 def : Pat<(f32 (fround RFP64:$src)), (COPY_TO_REGCLASS RFP64:$src, RFP32)>,
694 def : Pat<(f32 (fround RFP80:$src)), (COPY_TO_REGCLASS RFP80:$src, RFP32)>,
696 def : Pat<(f64 (fround RFP80:$src)), (COPY_TO_REGCLASS RFP80:$src, RFP64)>,
DX86ISelDAGToDAG.cpp2657 Reg = SDValue(CurDAG->getMachineNode(X86::COPY_TO_REGCLASS, dl, in Select()
2693 Reg = SDValue(CurDAG->getMachineNode(X86::COPY_TO_REGCLASS, dl, in Select()
/external/llvm/lib/Target/PowerPC/
DPPCInstrVSX.td838 (COPY_TO_REGCLASS $A, VSRC)>;
840 (COPY_TO_REGCLASS $A, VSRC)>;
842 (COPY_TO_REGCLASS $A, VSRC)>;
844 (COPY_TO_REGCLASS $A, VSRC)>;
847 (COPY_TO_REGCLASS $A, VRRC)>;
849 (COPY_TO_REGCLASS $A, VRRC)>;
851 (COPY_TO_REGCLASS $A, VRRC)>;
853 (COPY_TO_REGCLASS $A, VRRC)>;
856 (COPY_TO_REGCLASS $A, VSRC)>;
858 (COPY_TO_REGCLASS $A, VSRC)>;
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DPPCInstrQPX.td880 (QVFCPSGN (COPY_TO_REGCLASS $frA, QFRC), $frB)>;
882 (QVFCPSGNs (COPY_TO_REGCLASS $frA, QSRC), $frB)>;
1107 (COPY_TO_REGCLASS $src, QFRC)>;
1110 (COPY_TO_REGCLASS $src, QSRC)>;
1115 (COPY_TO_REGCLASS $src, QFRC)>;
DPPCInstrInfo.td2720 (COPY_TO_REGCLASS (LFS iaddr:$src), F8RC)>;
2722 (COPY_TO_REGCLASS (LFSX xaddr:$src), F8RC)>;
2725 (COPY_TO_REGCLASS $src, F8RC)>;
2749 (FCPSGND (COPY_TO_REGCLASS $frA, F8RC), $frB)>;
2751 (FCPSGNS (COPY_TO_REGCLASS $frA, F4RC), $frB)>;
DPPCFastISel.cpp1104 TII.get(TargetOpcode::COPY_TO_REGCLASS), TmpReg) in SelectFPToI()
/external/llvm/include/llvm/Target/
DTargetOpcodes.h66 COPY_TO_REGCLASS = 10, enumerator
/external/llvm/lib/Target/ARM/
DARMInstrVFP.td613 (i32 (COPY_TO_REGCLASS (VCVTBSH SPR:$a), GPR))>;
616 (i32 (COPY_TO_REGCLASS (VCVTBDH DPR:$a), GPR))>;
619 (VCVTBHS (COPY_TO_REGCLASS GPR:$a, SPR))>;
622 (VCVTBHD (COPY_TO_REGCLASS GPR:$a, SPR))>;
676 (COPY_TO_REGCLASS
680 (COPY_TO_REGCLASS
686 (COPY_TO_REGCLASS
690 (COPY_TO_REGCLASS
1004 (VSITOD (COPY_TO_REGCLASS GPR:$a, SPR))>;
1022 (VSITOS (COPY_TO_REGCLASS GPR:$a, SPR))>;
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DARMInstrNEON.td5618 (COPY_TO_REGCLASS
5622 (COPY_TO_REGCLASS
5626 (EXTRACT_SUBREG (v2f32 (COPY_TO_REGCLASS (v2f32 DPR:$src1),DPR_VFP2)),
5629 (EXTRACT_SUBREG (v4f32 (COPY_TO_REGCLASS (v4f32 QPR:$src1),QPR_VFP2)),
5688 (INSERT_SUBREG (v2f32 (COPY_TO_REGCLASS DPR:$src1, DPR_VFP2)),
5691 (INSERT_SUBREG (v4f32 (COPY_TO_REGCLASS QPR:$src1, QPR_VFP2)),
6249 (COPY_TO_REGCLASS (f32 (EXTRACT_SUBREG
6251 (f32 (COPY_TO_REGCLASS i32:$Rn, SPR)),
6258 (f32 (COPY_TO_REGCLASS i32:$hash_e, SPR)),
6265 (f32 (COPY_TO_REGCLASS i32:$hash_e, SPR)),
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/external/llvm/lib/Target/Mips/
DMipsDSPInstrInfo.td1281 (COPY_TO_REGCLASS SrcRC:$src, DstRC)>;
1289 (v2i16 (COPY_TO_REGCLASS (LW addr:$a), DSPR))>;
1291 (v4i8 (COPY_TO_REGCLASS (LW addr:$a), DSPR))>;
1293 (SW (COPY_TO_REGCLASS DSPR:$val, GPR32), addr:$a)>;
1295 (SW (COPY_TO_REGCLASS DSPR:$val, GPR32), addr:$a)>;
1340 (ValTy (COPY_TO_REGCLASS (ADDiu ZERO, -1), DSPR)),
1348 (ValTy (COPY_TO_REGCLASS (ADDiu ZERO, -1), DSPR))))>;
DMipsMSAInstrInfo.td3580 (COPY_TO_REGCLASS SrcVT:$src, DstRC), preds>;
3638 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 27),
3646 (COPY_TO_REGCLASS (Insn (COPY_TO_REGCLASS SrcVT:$src, ViaRC), 177),
3661 (COPY_TO_REGCLASS
3663 (COPY_TO_REGCLASS
3664 (SHF_B (COPY_TO_REGCLASS SrcVT:$src, MSA128B), 27),
3759 (SRA (COPY_TO_REGCLASS (i32 (EXTRACT_SUBREG (SPLAT_B v16i8:$ws,
3764 (SRA (COPY_TO_REGCLASS (i32 (EXTRACT_SUBREG (SPLAT_H v8i16:$ws,
3769 (COPY_TO_REGCLASS (i32 (EXTRACT_SUBREG (SPLAT_W v4i32:$ws,
3774 (COPY_TO_REGCLASS (i64 (EXTRACT_SUBREG (SPLAT_D v2i64:$ws,
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DMipsSEISelDAGToDAG.cpp927 Res = CurDAG->getMachineNode(Mips::COPY_TO_REGCLASS, SDLoc(Node), in selectNode()
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td520 (COPY_TO_REGCLASS (MOVi32imm (bitcast_fpimm_to_i32 f32:$in)), FPR32)>;
522 (COPY_TO_REGCLASS (MOVi64imm (bitcast_fpimm_to_i64 f64:$in)), FPR64)>;
3646 (f32 (COPY_TO_REGCLASS GPR32:$Rn, FPR32)), ssub)>;
3649 (f32 (COPY_TO_REGCLASS GPR32:$Rn, FPR32)), ssub)>;
3653 (f32 (COPY_TO_REGCLASS GPR32:$Rn, FPR32)), ssub)>;
3656 (f32 (COPY_TO_REGCLASS GPR32:$Rn, FPR32)), ssub)>;
5203 def : Pat<(v8i8 (bitconvert GPR64:$Xn)), (COPY_TO_REGCLASS GPR64:$Xn, FPR64)>;
5204 def : Pat<(v4i16 (bitconvert GPR64:$Xn)), (COPY_TO_REGCLASS GPR64:$Xn, FPR64)>;
5205 def : Pat<(v2i32 (bitconvert GPR64:$Xn)), (COPY_TO_REGCLASS GPR64:$Xn, FPR64)>;
5206 def : Pat<(v4f16 (bitconvert GPR64:$Xn)), (COPY_TO_REGCLASS GPR64:$Xn, FPR64)>;
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/external/llvm/lib/Target/PowerPC/InstPrinter/
DPPCInstPrinter.cpp112 if (MI->getOpcode() == TargetOpcode::COPY_TO_REGCLASS) in printInst()
/external/llvm/lib/Target/PowerPC/MCTargetDesc/
DPPCMCCodeEmitter.cpp108 if (Opcode == TargetOpcode::COPY_TO_REGCLASS) in EncodeInstruction()
/external/llvm/lib/Target/Sparc/
DSparcInstr64Bit.td22 def : Pat<(i64 (anyext i32:$val)), (COPY_TO_REGCLASS $val, I64Regs)>;
23 def : Pat<(i32 (trunc i64:$val)), (COPY_TO_REGCLASS $val, IntRegs)>;
/external/mesa3d/src/gallium/drivers/radeon/
DSIInstructions.td1043 (S_MOV_B64 (COPY_TO_REGCLASS VCCReg:$vcc, SReg_64))
1048 (COPY_TO_REGCLASS SReg_64:$vcc, VCCReg)
/external/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp732 if (Opc == TargetOpcode::COPY_TO_REGCLASS) { in EmitMachineNode()
DScheduleDAGRRList.cpp2948 TargetOpcode::COPY_TO_REGCLASS) in AddPseudoTwoAddrDeps()
/external/llvm/lib/Target/R600/
DAMDGPUISelDAGToDAG.cpp332 return CurDAG->SelectNodeTo(N, AMDGPU::COPY_TO_REGCLASS, EltVT, in Select()
DSIISelLowering.cpp1876 SDNode *Copy = DAG.getMachineNode(TargetOpcode::COPY_TO_REGCLASS, in adjustWritemask()

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