| /external/llvm/lib/CodeGen/ |
| D | LiveRangeCalc.h | 80 LiveRange &LR; member
94 LiveInBlock(LiveRange &LR, MachineDomTreeNode *node, SlotIndex kill) in LiveInBlock()
95 : LR(LR), DomNode(node), Kill(kill), Value(nullptr) {} in LiveInBlock()
114 bool findReachingDefs(LiveRange &LR, MachineBasicBlock &UseMBB,
132 void extendToUses(LiveRange &LR, unsigned Reg, unsigned LaneMask);
172 void extend(LiveRange &LR, SlotIndex Use, unsigned PhysReg = 0);
177 void createDeadDefs(LiveRange &LR, unsigned Reg);
183 void extendToUses(LiveRange &LR, unsigned PhysReg) { in extendToUses() argument
184 extendToUses(LR, PhysReg, ~0u); in extendToUses()
225 void addLiveInBlock(LiveRange &LR,
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| D | LiveIntervalAnalysis.cpp | 160 if (LiveRange *LR = RegUnitRanges[i]) in print() local
161 OS << PrintRegUnit(i, TRI) << ' ' << *LR << '\n'; in print()
251 void LiveIntervals::computeRegUnitRange(LiveRange &LR, unsigned Unit) { in computeRegUnitRange() argument
264 LRCalc->createDeadDefs(LR, *Supers); in computeRegUnitRange()
275 LRCalc->extendToUses(LR, Reg); in computeRegUnitRange()
281 LR.flushSegmentSet(); in computeRegUnitRange()
312 LiveRange *LR = RegUnitRanges[Unit]; in computeLiveInRegUnits() local
313 if (!LR) { in computeLiveInRegUnits()
315 LR = RegUnitRanges[Unit] = new LiveRange(UseSegmentSetForPhysRegs); in computeLiveInRegUnits()
318 VNInfo *VNI = LR->createDeadDef(Begin, getVNInfoAllocator()); in computeLiveInRegUnits()
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| D | LiveRangeCalc.cpp | 44 LiveRange &LR, const MachineOperand &MO) { in createDeadDef() argument
50 LR.createDeadDef(DefIdx, Alloc); in createDeadDef()
131 void LiveRangeCalc::createDeadDefs(LiveRange &LR, unsigned Reg) { in createDeadDefs() argument
137 createDeadDef(*Indexes, *Alloc, LR, MO); in createDeadDefs()
141 void LiveRangeCalc::extendToUses(LiveRange &LR, unsigned Reg, unsigned Mask) { in extendToUses() argument
191 extend(LR, UseIdx, Reg); in extendToUses()
215 Updater.setDest(&I.LR); in updateFromLiveIns()
222 void LiveRangeCalc::extend(LiveRange &LR, SlotIndex Use, unsigned PhysReg) { in extend() argument
231 if (LR.extendInBlock(Indexes->getMBBStartIdx(UseMBB), Use)) in extend()
238 if (findReachingDefs(LR, *UseMBB, Use, PhysReg)) in extend()
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| D | LiveInterval.cpp | 53 LiveRange *LR; member in __anonb437b32b0111::CalcLiveRangeUtilBase
56 CalcLiveRangeUtilBase(LiveRange *LR) : LR(LR) {} in CalcLiveRangeUtilBase() argument
67 VNInfo *VNI = LR->getNextValue(Def, VNInfoAllocator); in createDeadDef()
87 VNInfo *VNI = LR->getNextValue(Def, VNInfoAllocator); in createDeadDef()
240 CalcLiveRangeUtilVector(LiveRange *LR) : CalcLiveRangeUtilVectorBase(LR) {} in CalcLiveRangeUtilVector() argument
245 LiveRange::Segments &segmentsColl() { return LR->segments; } in segmentsColl()
247 void insertAtEnd(const Segment &S) { LR->segments.push_back(S); } in insertAtEnd()
249 iterator find(SlotIndex Pos) { return LR->find(Pos); } in find()
252 return std::upper_bound(LR->begin(), LR->end(), S.start); in findInsertPos()
268 CalcLiveRangeUtilSet(LiveRange *LR) : CalcLiveRangeUtilSetBase(LR) {} in CalcLiveRangeUtilSet() argument
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| D | MachineVerifier.cpp | 216 const LiveRange &LR, unsigned Reg, unsigned LaneMask);
218 const LiveRange &LR, unsigned Reg, unsigned LaneMask);
417 const LiveRange &LR, unsigned Reg, in report() argument
420 errs() << "- liverange: " << LR << '\n'; in report()
427 const LiveRange &LR, unsigned Reg, in report() argument
430 errs() << "- liverange: " << LR << '\n'; in report()
1008 if (const LiveRange *LR = LiveInts->getCachedRegUnit(*Units)) { in checkLiveness() local
1009 LiveQueryResult LRQ = LR->Query(UseIdx); in checkLiveness()
1013 << ' ' << *LR << '\n'; in checkLiveness()
1017 errs() << PrintRegUnit(*Units, TRI) << ' ' << *LR << '\n'; in checkLiveness()
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| D | RegAllocFast.cpp | 233 void RAFast::addKillFlag(const LiveReg &LR) { in addKillFlag() argument
234 if (!LR.LastUse) return; in addKillFlag()
235 MachineOperand &MO = LR.LastUse->getOperand(LR.LastOpNum); in addKillFlag()
236 if (MO.isUse() && !LR.LastUse->isRegTiedToDefOperand(LR.LastOpNum)) { in addKillFlag()
237 if (MO.getReg() == LR.PhysReg) in addKillFlag()
240 LR.LastUse->addRegisterKilled(LR.PhysReg, TRI, true); in addKillFlag()
277 LiveReg &LR = *LRI; in spillVirtReg() local
278 assert(PhysRegState[LR.PhysReg] == LRI->VirtReg && "Broken RegState mapping"); in spillVirtReg()
280 if (LR.Dirty) { in spillVirtReg()
283 bool SpillKill = LR.LastUse != MI; in spillVirtReg()
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| D | RegisterCoalescer.cpp | 994 if (LiveRange *LR = LIS->getCachedRegUnit(*Units)) in reMaterializeTrivialDef() local
995 LR->createDeadDef(NewMIIdx.getRegSlot(), LIS->getVNInfoAllocator()); in reMaterializeTrivialDef()
1019 if (LiveRange *LR = LIS->getCachedRegUnit(*Units)) in reMaterializeTrivialDef() local
1020 LR->createDeadDef(NewMIIdx.getRegSlot(), LIS->getVNInfoAllocator()); in reMaterializeTrivialDef()
1496 LiveRange &LR = LIS->getRegUnit(*UI); in joinReservedPhysReg() local
1497 LR.createDeadDef(DestRegIdx, LIS->getVNInfoAllocator()); in joinReservedPhysReg()
1581 LiveRange &LR; member in __anona927d7ac0211::JoinVals
1743 JoinVals(LiveRange &LR, unsigned Reg, unsigned SubIdx, unsigned LaneMask, in JoinVals() argument
1747 : LR(LR), Reg(Reg), SubIdx(SubIdx), LaneMask(LaneMask), in JoinVals()
1750 TRI(TRI), Assignments(LR.getNumValNums(), -1), Vals(LR.getNumValNums()) in JoinVals()
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| D | RegisterPressure.cpp | 505 const LiveRange *LR = getLiveRange(Reg); in recede() local
506 if (LR) { in recede()
507 LiveQueryResult LRQ = LR->Query(SlotIdx); in recede()
531 const LiveRange *LR = getLiveRange(Reg); in recede() local
532 if (LR) { in recede()
533 LiveQueryResult LRQ = LR->Query(SlotIdx); in recede()
590 const LiveRange *LR = getLiveRange(Reg); in advance() local
591 lastUse = LR && LR->Query(SlotIdx).isKill(); in advance()
725 const LiveRange *LR = getLiveRange(Reg); in bumpUpwardPressure() local
726 if (LR) { in bumpUpwardPressure()
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| /external/llvm/lib/Fuzzer/ |
| D | FuzzerDFSan.cpp | 144 LabelRange &Join(LabelRange LR) { in Join()
145 return *this = Join(*this, LR); in Join()
154 std::ostream &operator<<(std::ostream &os, const LabelRange &LR) { in operator <<() argument
155 return os << "[" << LR.Beg << "," << LR.End << ")"; in operator <<()
166 LabelRange LR; member
183 LabelRange &LR = LabelRanges[L]; in GetLabelRange() local
184 if (LR.Beg < LR.End || L == 0) in GetLabelRange()
185 return LR; in GetLabelRange()
188 return LR = LabelRange::Join(GetLabelRange(LI->l1), GetLabelRange(LI->l2)); in GetLabelRange()
189 return LR = LabelRange::Singleton(LI); in GetLabelRange()
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| /external/bison/tests/ |
| D | reduce.at | 468 [[canonical LR]], [[]],
476 // Conflict resolution renders state 12 unreachable for canonical LR(1). We
497 Bison and Menhir accept non-LR(1) grammars with conflict resolution. Pager
498 designed his algorithm only for LR(1) grammars. */
581 ]AT_COND_CASE([[canonical LR]], [['a']],
607 'a' shift, and go to state ]AT_COND_CASE([[canonical LR]], [[17]],
611 ]AT_COND_CASE([[canonical LR]], [[$end]],
617 7 c: A .]AT_COND_CASE([[canonical LR]], [[ [$end]]])[
619 ]AT_COND_CASE([[canonical LR]], [[$end]],
625 3 S: 'c' c .]AT_COND_CASE([[canonical LR]], [[ [$end]]])[
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| /external/llvm/include/llvm/CodeGen/ |
| D | LiveIntervalAnalysis.h | 174 void extendToIndices(LiveRange &LR, ArrayRef<SlotIndex> Indices);
184 void pruneValue(LiveRange &LR, SlotIndex Kill,
221 bool isLiveInToMBB(const LiveRange &LR, in isLiveInToMBB() argument
223 return LR.liveAt(getMBBStartIdx(mbb)); in isLiveInToMBB()
226 bool isLiveOutOfMBB(const LiveRange &LR, in isLiveOutOfMBB() argument
228 return LR.liveAt(getMBBEndIdx(mbb).getPrevSlot()); in isLiveOutOfMBB()
380 LiveRange *LR = RegUnitRanges[Unit]; in getRegUnit() local
381 if (!LR) { in getRegUnit()
384 RegUnitRanges[Unit] = LR = new LiveRange(UseSegmentSetForPhysRegs); in getRegUnit()
385 computeRegUnitRange(*LR, Unit); in getRegUnit()
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| D | LiveInterval.h | 581 inline raw_ostream &operator<<(raw_ostream &OS, const LiveRange &LR) {
582 LR.print(OS);
778 LiveRange *LR; variable
788 LiveRangeUpdater(LiveRange *lr = nullptr) : LR(lr) {} in LR() function
811 if (LR != lr && isDirty()) in setDest()
813 LR = lr; in setDest()
817 LiveRange *getDest() const { return LR; } in getDest()
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| /external/libhevc/common/arm/ |
| D | ihevc_mem_fns.s | 90 MOV PC,LR
120 BXEQ LR
130 BX LR
162 BX LR
191 BXEQ LR
200 BX LR
234 BX LR
264 BXEQ LR
273 BX LR
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| /external/clang/lib/StaticAnalyzer/Checkers/ |
| D | PointerArithChecker.cpp | 44 const MemRegion *LR = LV.getAsRegion(); in checkPreStmt() local
46 if (!LR || !RV.isConstant()) in checkPreStmt()
51 if (isa<VarRegion>(LR) || isa<CodeTextRegion>(LR) || in checkPreStmt()
52 isa<CompoundLiteralRegion>(LR)) { in checkPreStmt()
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| D | PointerSubChecker.cpp | 47 const MemRegion *LR = LV.getAsRegion(); in checkPreStmt() local
50 if (!(LR && RR)) in checkPreStmt()
53 const MemRegion *BaseLR = LR->getBaseRegion(); in checkPreStmt()
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| /external/clang/test/PCH/ |
| D | cxx-reference.h | 3 typedef char (&LR);
10 LR &lrlr = c;
11 LR &&rrlr = c;
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| /external/clang/test/Lexer/ |
| D | string_concat.cpp | 18 …const char* f = u8"abc" LR"(abc)"; // expected-error {{unsupported non-standard concatenation of s… in f()
27 …const char16_t* l = u"abc" LR"(abc)"; // expected-error {{unsupported non-standard concatenation o… in f()
36 …const char32_t* r = U"abc" LR"(abc)"; // expected-error {{unsupported non-standard concatenation o… in f()
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| D | string-literal-encoding.c | 12 … wchar_t const *d = LR"(�����)"; // expected-error {{illegal character encoding in string literal}} in f()
26 …wchar_t const *d = LR"(foo �����)"; // expected-error {{illegal character encoding in string liter… in g()
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| /external/llvm/lib/Target/R600/ |
| D | SIFixSGPRLiveRanges.cpp | 162 LiveRange *LR = RegLR.second; in runOnMachineFunction() local
168 bool LiveInToA = LIS->isLiveInToMBB(*LR, SuccA); in runOnMachineFunction()
169 bool LiveInToB = LIS->isLiveInToMBB(*LR, SuccB); in runOnMachineFunction()
177 DEBUG(dbgs() << "Possible SGPR conflict detected " << " in " << *LR << in runOnMachineFunction()
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| /external/llvm/lib/Target/ARM/ |
| D | ARMCallingConv.td | 205 def CSR_AAPCS : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7, R6, R5, R4,
212 def CSR_AAPCS_ThisReturn : CalleeSavedRegs<(add LR, R11, R10, R9, R8, R7, R6,
218 def CSR_iOS : CalleeSavedRegs<(add LR, R7, R6, R5, R4, (sub CSR_AAPCS, R9))>;
220 def CSR_iOS_ThisReturn : CalleeSavedRegs<(add LR, R7, R6, R5, R4,
228 // For most interrupts, all registers except SP and LR are shared with
229 // user-space. We mark LR to be saved anyway, since this is what the ARM backend
231 def CSR_GenericInt : CalleeSavedRegs<(add LR, (sequence "R%u", 12, 0))>;
234 // of R8-R12, in addition to SP and LR. As before, mark LR for saving too.
239 def CSR_FIQ : CalleeSavedRegs<(add LR, R11, (sequence "R%u", 7, 0))>;
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| /external/llvm/test/MC/ARM/ |
| D | arm-load-store-multiple-deprecated.s | 159 @ CHECK: warning: use of LR and PC simultaneously in the list is deprecated
161 @ CHECK: warning: use of LR and PC simultaneously in the list is deprecated
171 @ CHECK: warning: use of LR and PC simultaneously in the list is deprecated
173 @ CHECK: warning: use of LR and PC simultaneously in the list is deprecated
183 @ CHECK: warning: use of LR and PC simultaneously in the list is deprecated
185 @ CHECK: warning: use of LR and PC simultaneously in the list is deprecated
195 @ CHECK: warning: use of LR and PC simultaneously in the list is deprecated
197 @ CHECK: warning: use of LR and PC simultaneously in the list is deprecated
209 @ CHECK: warning: use of LR and PC simultaneously in the list is deprecated
211 @ CHECK: warning: use of LR and PC simultaneously in the list is deprecated
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| /external/llvm/test/CodeGen/R600/ |
| D | predicates.ll | 26 ; CHECK: LSH{{[LR] \* T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, Pred_sel
27 ; CHECK: LSH{{[LR] \* T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, Pred_sel
80 ; CHECK: LSH{{[LR] \* T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, Pred_sel
81 ; CHECK: LSH{{[LR] \* T[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, 1, Pred_sel
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| /external/llvm/test/CodeGen/XCore/ |
| D | epilogue_prologue.ll | 29 ; FP + small frame: spill FP+SR+R0+LR = entsp 3 + extsp 1
45 ; !FP + small frame: spill R0+LR = entsp 2
102 ; FP + large frame: spill FP+SR+R4+LR = entsp 3 + 200000 + extsp 1
155 ; !FP + large frame: spill SR+SR+R4+LR = entsp 4 + 200000
209 ; FP + large frame: spill FP+SR+LR = entsp 2 + 256 + extsp 1
223 ; !FP + large frame: spill SR+SR+LR = entsp 3 + 256
237 ; FP + large frame: spill FP+SR+LR = entsp 2 + 32768 + extsp 1
251 ; !FP + large frame: spill SR+SR+LR = entsp 3 + 32768
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| /external/valgrind/coregrind/m_dispatch/ |
| D | dispatch-s390x-linux.S | 54 #undef LR
55 #define LR S390_REGNO_LINK_REGISTER macro
172 br LR
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| /external/llvm/include/llvm/ExecutionEngine/Orc/ |
| D | LambdaResolver.h | 54 typedef LambdaResolver<ExternalLookupFtorT, DylibLookupFtorT> LR; in createLambdaResolver() typedef
55 return make_unique<LR>(std::move(ExternalLookupFtor), in createLambdaResolver()
|