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Searched refs:Operands (Results 1 – 25 of 88) sorted by relevance

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/external/llvm/lib/Target/R600/AsmParser/
DAMDGPUAsmParser.cpp330 OperandVector &Operands, MCStreamer &Out,
334 OperandMatchResultTy parseOperand(OperandVector &Operands, StringRef Mnemonic);
336 SMLoc NameLoc, OperandVector &Operands) override;
341 OperandVector &Operands,
344 OperandMatchResultTy parseNamedBit(const char *Name, OperandVector &Operands,
349 OperandVector &Operands);
352 void cvtDSOffset01(MCInst &Inst, const OperandVector &Operands);
353 void cvtDS(MCInst &Inst, const OperandVector &Operands);
354 OperandMatchResultTy parseDSOptionalOps(OperandVector &Operands);
355 OperandMatchResultTy parseDSOff01OptionalOps(OperandVector &Operands);
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/external/llvm/utils/TableGen/
DFastISelEmitter.cpp118 SmallVector<OpKind, 3> Operands; member
121 return Operands < O.Operands; in operator <()
124 return Operands == O.Operands; in operator ==()
127 bool empty() const { return Operands.empty(); } in empty()
130 for (unsigned i = 0, e = Operands.size(); i != e; ++i) in hasAnyImmediateCodes()
131 if (Operands[i].isImm() && Operands[i].getImmCode() != 0) in hasAnyImmediateCodes()
140 for (unsigned i = 0, e = Operands.size(); i != e; ++i) in getWithoutImmCodes()
141 if (!Operands[i].isImm()) in getWithoutImmCodes()
142 Result.Operands.push_back(Operands[i]); in getWithoutImmCodes()
144 Result.Operands.push_back(OpKind::getImm(0)); in getWithoutImmCodes()
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DPseudoLoweringEmitter.cpp93 if (DI->getDef() != Insn.Operands[BaseIdx + i].Rec) in addDagOperandMapping()
97 Insn.Operands[BaseIdx + i].Rec->getName() + "'"); in addDagOperandMapping()
101 for (unsigned I = 0, E = Insn.Operands[i].MINumOperands; I != E; ++I) in addDagOperandMapping()
103 OpsAdded += Insn.Operands[i].MINumOperands; in addDagOperandMapping()
146 if (Insn.Operands.size() != Dag->getNumArgs()) in evaluateExpansion()
151 for (unsigned i = 0, e = Insn.Operands.size(); i != e; ++i) in evaluateExpansion()
152 NumMIOperands += Insn.Operands[i].MINumOperands; in evaluateExpansion()
170 for (unsigned i = 0, e = SourceInsn.Operands.size(); i != e; ++i) in evaluateExpansion()
171 SourceOperands[SourceInsn.Operands[i].Name] = i; in evaluateExpansion()
174 for (unsigned i = 0, e = Insn.Operands.size(); i != e; ++i) { in evaluateExpansion()
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DAsmWriterInst.cpp166 Operands.push_back(AsmWriterOperand("PrintSpecial", in AsmWriterInst()
173 unsigned OpNo = CGI.Operands.getOperandNamed(VarName); in AsmWriterInst()
174 CGIOperandList::OperandInfo OpInfo = CGI.Operands[OpNo]; in AsmWriterInst()
177 Operands.push_back(AsmWriterOperand(OpInfo.PrinterMethodName, in AsmWriterInst()
185 Operands.push_back(AsmWriterOperand("return;", in AsmWriterInst()
194 if (Operands.size() != Other.Operands.size()) return ~1; in MatchesAllButOneOp()
197 for (unsigned i = 0, e = Operands.size(); i != e; ++i) { in MatchesAllButOneOp()
198 if (Operands[i] != Other.Operands[i]) { in MatchesAllButOneOp()
DInstrInfoEmitter.cpp64 std::map<std::string, unsigned> &Operands,
91 for (auto &Op : Inst.Operands) { in GetOperandInfo()
204 std::map<std::string, unsigned> &Operands, in initOperandMapData() argument
212 for (const auto &Info : Inst->Operands) { in initOperandMapData()
213 StrUintMapIter I = Operands.find(Info.Name); in initOperandMapData()
215 if (I == Operands.end()) { in initOperandMapData()
216 I = Operands.insert(Operands.begin(), in initOperandMapData()
244 std::map<std::string, unsigned> Operands; in emitOperandNameMappings() local
247 initOperandMapData(NumberedInstructions, Namespace, Operands, OperandMap); in emitOperandNameMappings()
255 for (const auto &Op : Operands) in emitOperandNameMappings()
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DCodeEmitterGen.cpp88 if (CGI.Operands.hasOperandNamed(VarName, OpIdx)) { in AddCodeToMergeInOperand()
90 OpIdx = CGI.Operands[OpIdx].MIOperandNo; in AddCodeToMergeInOperand()
91 assert(!CGI.Operands.isFlatOperandNotEmitted(OpIdx) && in AddCodeToMergeInOperand()
94 unsigned NumberOps = CGI.Operands.size(); in AddCodeToMergeInOperand()
98 (CGI.Operands.isFlatOperandNotEmitted(NumberedOp) || in AddCodeToMergeInOperand()
100 CGI.Operands.getSubOperandNumber(NumberedOp).first)))) { in AddCodeToMergeInOperand()
103 if (NumberedOp >= CGI.Operands.back().MIOperandNo + in AddCodeToMergeInOperand()
104 CGI.Operands.back().MINumOperands) { in AddCodeToMergeInOperand()
117 std::pair<unsigned, unsigned> SO = CGI.Operands.getSubOperandNumber(OpIdx); in AddCodeToMergeInOperand()
118 std::string &EncoderMethodName = CGI.Operands[SO.first].EncoderMethodName; in AddCodeToMergeInOperand()
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DAsmWriterInst.h93 std::vector<AsmWriterOperand> Operands;
108 if (!Operands.empty() && in AddLiteralString()
109 Operands.back().OperandType == AsmWriterOperand::isLiteralTextOperand) in AddLiteralString()
110 Operands.back().Str.append(Str); in AddLiteralString()
112 Operands.push_back(AsmWriterOperand(Str)); in AddLiteralString()
DAsmWriterEmitter.cpp115 for (unsigned i = 0, e = FirstInst.Operands.size(); i != e; ++i) { in EmitInstructions()
118 O << " " << FirstInst.Operands[i].getCode(); in EmitInstructions()
126 FirstInst.Operands[i])); in EmitInstructions()
132 AWI.Operands[i])); in EmitInstructions()
163 if (Inst->Operands.empty()) in FindUniqueOperandCommands()
166 Command = " " + Inst->Operands[0].getCode() + "\n"; in FindUniqueOperandCommands()
205 if (!FirstInst || FirstInst->Operands.size() == Op) in FindUniqueOperandCommands()
220 if (!OtherInst || OtherInst->Operands.size() == Op || in FindUniqueOperandCommands()
221 OtherInst->Operands[Op] != FirstInst->Operands[Op]) { in FindUniqueOperandCommands()
230 std::string Command = " " + FirstInst->Operands[Op].getCode() + "\n"; in FindUniqueOperandCommands()
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DFixedLenDecoderEmitter.cpp315 const std::map<unsigned, std::vector<OperandInfo> > &Operands; member in __anonf641aa1c0711::FilterChooser
345 : AllInstructions(Insts), Opcodes(IDs), Operands(Ops), Filters(), in FilterChooser()
356 : AllInstructions(Insts), Opcodes(IDs), Operands(Ops), in FilterChooser()
553 Owner->Operands, BitValueArray, *Owner))); in recurse()
580 Owner->Operands, BitValueArray, *Owner))); in recurse()
1063 for (const auto &Op : Operands.find(Opc)->second) { in emitDecoder()
1667 std::map<unsigned, std::vector<OperandInfo> > &Operands){ in populateInstruction()
1683 Operands[Opc] = InsnOperands; in populateInstruction()
1705 for (unsigned i = 0; i < CGI.Operands.size(); ++i) { in populateInstruction()
1706 int tiedTo = CGI.Operands[i].getTiedRegister(); in populateInstruction()
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DCodeGenInstruction.cpp296 : TheDef(R), Operands(R), InferredFrom(nullptr) { in CodeGenInstruction()
310 isPredicable = Operands.isPredicable || R->getValueAsBit("isPredicable"); in CodeGenInstruction()
341 ParseConstraints(R->getValueAsString("Constraints"), Operands); in CodeGenInstruction()
344 Operands.ProcessDisableEncoding(R->getValueAsString("DisableEncoding")); in CodeGenInstruction()
609 for (unsigned i = 0, e = ResultInst->Operands.size(); i != e; ++i) { in CodeGenInstAlias()
614 if (ResultInst->Operands[i].MINumOperands == 1 && in CodeGenInstAlias()
615 ResultInst->Operands[i].getTiedRegister() != -1) in CodeGenInstAlias()
621 Record *InstOpRec = ResultInst->Operands[i].Rec; in CodeGenInstAlias()
622 unsigned NumSubOps = ResultInst->Operands[i].MINumOperands; in CodeGenInstAlias()
638 DagInit *MIOI = ResultInst->Operands[i].MIOperandInfo; in CodeGenInstAlias()
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/external/llvm/lib/Target/SystemZ/AsmParser/
DSystemZAsmParser.cpp345 OperandMatchResultTy parseRegister(OperandVector &Operands,
353 OperandMatchResultTy parseAddress(OperandVector &Operands,
357 OperandMatchResultTy parsePCRel(OperandVector &Operands, int64_t MinVal,
360 bool parseOperand(OperandVector &Operands, StringRef Mnemonic);
377 SMLoc NameLoc, OperandVector &Operands) override;
379 OperandVector &Operands, MCStreamer &Out,
384 OperandMatchResultTy parseGR32(OperandVector &Operands) { in parseGR32() argument
385 return parseRegister(Operands, RegGR, SystemZMC::GR32Regs, GR32Reg); in parseGR32()
387 OperandMatchResultTy parseGRH32(OperandVector &Operands) { in parseGRH32() argument
388 return parseRegister(Operands, RegGR, SystemZMC::GRH32Regs, GRH32Reg); in parseGRH32()
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/external/llvm/include/llvm/Analysis/
DScalarEvolutionExpressions.h140 const SCEV *const *Operands;
145 : SCEV(ID, T), Operands(O), NumOperands(N) {} in SCEVNAryExpr()
151 return Operands[i]; in getOperand()
156 op_iterator op_begin() const { return Operands; } in op_begin()
157 op_iterator op_end() const { return Operands + NumOperands; } in op_end()
298 const SCEV *getStart() const { return Operands[0]; } in getStart()
671 SmallVector<const SCEV *, 2> Operands; in visitAddExpr() local
673 Operands.push_back(visit(Expr->getOperand(i))); in visitAddExpr()
674 return SE.getAddExpr(Operands); in visitAddExpr()
678 SmallVector<const SCEV *, 2> Operands; in visitMulExpr() local
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/external/llvm/include/llvm/MC/
DMCInst.h153 SmallVector<MCOperand, 8> Operands;
163 const MCOperand &getOperand(unsigned i) const { return Operands[i]; }
164 MCOperand &getOperand(unsigned i) { return Operands[i]; }
165 unsigned getNumOperands() const { return Operands.size(); }
168 Operands.push_back(Op);
171 void clear() { Operands.clear(); }
172 size_t size() const { return Operands.size(); }
176 iterator begin() { return Operands.begin(); }
177 const_iterator begin() const { return Operands.begin(); }
178 iterator end() { return Operands.end(); }
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DMCTargetAsmParser.h145 SMLoc NameLoc, OperandVector &Operands) = 0;
170 OperandVector &Operands, MCStreamer &Out,
193 const OperandVector &Operands) = 0;
/external/llvm/lib/Target/X86/AsmParser/
DX86AsmParser.cpp694 void EmitInstruction(MCInst &Inst, OperandVector &Operands, MCStreamer &Out);
697 OperandVector &Operands, MCStreamer &Out,
701 void MatchFPUWaitAlias(SMLoc IDLoc, X86Operand &Op, OperandVector &Operands,
708 OperandVector &Operands, MCStreamer &Out,
713 OperandVector &Operands, MCStreamer &Out,
727 bool HandleAVX512Operand(OperandVector &Operands,
786 SMLoc NameLoc, OperandVector &Operands) override;
1756 bool X86AsmParser::HandleAVX512Operand(OperandVector &Operands, in HandleAVX512Operand() argument
1790 Operands.push_back(X86Operand::CreateToken(BroadcastPrimitive, in HandleAVX512Operand()
1797 Operands.push_back(X86Operand::CreateToken("{", consumedToken)); in HandleAVX512Operand()
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/external/llvm/lib/Target/AArch64/AsmParser/
DAArch64AsmParser.cpp57 bool parseSysAlias(StringRef Name, SMLoc NameLoc, OperandVector &Operands);
59 bool parseCondCode(OperandVector &Operands, bool invertCondCode);
63 bool parseRegister(OperandVector &Operands);
65 bool parseVectorList(OperandVector &Operands);
66 bool parseOperand(OperandVector &Operands, bool isCondCode,
86 OperandVector &Operands, MCStreamer &Out,
97 OperandMatchResultTy tryParseOptionalShiftExtend(OperandVector &Operands);
98 OperandMatchResultTy tryParseBarrierOperand(OperandVector &Operands);
99 OperandMatchResultTy tryParseMRSSystemRegister(OperandVector &Operands);
100 OperandMatchResultTy tryParseSysReg(OperandVector &Operands);
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/external/llvm/lib/Target/ARM/AsmParser/
DARMAsmParser.cpp192 bool validatetLDMRegList(MCInst Inst, const OperandVector &Operands,
194 bool validatetSTMRegList(MCInst Inst, const OperandVector &Operands,
334 bool shouldOmitCCOutOperand(StringRef Mnemonic, OperandVector &Operands);
335 bool shouldOmitPredicateOperand(StringRef Mnemonic, OperandVector &Operands);
368 SMLoc NameLoc, OperandVector &Operands) override;
376 OperandVector &Operands, MCStreamer &Out,
3048 int ARMAsmParser::tryParseShiftRegister(OperandVector &Operands) { in tryParseShiftRegister() argument
3074 (ARMOperand *)Operands.pop_back_val().release()); in tryParseShiftRegister()
3134 Operands.push_back(ARMOperand::CreateShiftedRegister(ShiftTy, SrcReg, in tryParseShiftRegister()
3138 Operands.push_back(ARMOperand::CreateShiftedImmediate(ShiftTy, SrcReg, Imm, in tryParseShiftRegister()
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/external/llvm/lib/IR/
DConstantsContext.h342 ArrayRef<Constant *> Operands;
343 ConstantAggrKeyType(ArrayRef<Constant *> Operands) : Operands(Operands) {}
344 ConstantAggrKeyType(ArrayRef<Constant *> Operands, const ConstantClass *)
345 : Operands(Operands) {}
351 Operands = Storage;
355 return Operands == X.Operands;
358 if (Operands.size() != C->getNumOperands())
360 for (unsigned I = 0, E = Operands.size(); I != E; ++I)
361 if (Operands[I] != C->getOperand(I))
366 return hash_combine_range(Operands.begin(), Operands.end());
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/external/llvm/lib/Analysis/
DScalarEvolutionNormalization.cpp109 SmallVector<const SCEV *, 8> Operands; in TransformImpl() local
116 Operands.push_back(TransformSubExpr(*I, LUser, nullptr)); in TransformImpl()
119 const SCEV *Result = SE.getAddRecExpr(Operands, L, SCEV::FlagAnyWrap); in TransformImpl()
191 SmallVector<const SCEV *, 8> Operands; in TransformImpl() local
199 Operands.push_back(N); in TransformImpl()
204 case scAddExpr: return SE.getAddExpr(Operands); in TransformImpl()
205 case scMulExpr: return SE.getMulExpr(Operands); in TransformImpl()
206 case scSMaxExpr: return SE.getSMaxExpr(Operands); in TransformImpl()
207 case scUMaxExpr: return SE.getUMaxExpr(Operands); in TransformImpl()
DConstantFolding.cpp1402 Type *Ty, ArrayRef<Constant *> Operands, in ConstantFoldScalarCall() argument
1404 if (Operands.size() == 1) { in ConstantFoldScalarCall()
1405 if (ConstantFP *Op = dyn_cast<ConstantFP>(Operands[0])) { in ConstantFoldScalarCall()
1537 if (ConstantInt *Op = dyn_cast<ConstantInt>(Operands[0])) { in ConstantFoldScalarCall()
1563 if (isa<ConstantVector>(Operands[0]) || in ConstantFoldScalarCall()
1564 isa<ConstantDataVector>(Operands[0])) { in ConstantFoldScalarCall()
1565 Constant *Op = cast<Constant>(Operands[0]); in ConstantFoldScalarCall()
1587 if (isa<UndefValue>(Operands[0])) { in ConstantFoldScalarCall()
1589 return Operands[0]; in ConstantFoldScalarCall()
1596 if (Operands.size() == 2) { in ConstantFoldScalarCall()
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DScalarEvolution.cpp1107 SmallVector<const SCEV *, 4> Operands; in getTruncateExpr() local
1113 Operands.push_back(S); in getTruncateExpr()
1116 return getAddExpr(Operands); in getTruncateExpr()
1123 SmallVector<const SCEV *, 4> Operands; in getTruncateExpr() local
1129 Operands.push_back(S); in getTruncateExpr()
1132 return getMulExpr(Operands); in getTruncateExpr()
1138 SmallVector<const SCEV *, 4> Operands; in getTruncateExpr() local
1140 Operands.push_back(getTruncateExpr(AddRec->getOperand(i), Ty)); in getTruncateExpr()
1141 return getAddRecExpr(Operands, AddRec->getLoop(), SCEV::FlagAnyWrap); in getTruncateExpr()
2433 SmallVector<const SCEV *, 4> Operands; in getMulExpr() local
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/external/llvm/lib/Target/Sparc/AsmParser/
DSparcAsmParser.cpp50 OperandVector &Operands, MCStreamer &Out,
55 SMLoc NameLoc, OperandVector &Operands) override;
62 OperandMatchResultTy parseMEMOperand(OperandVector &Operands);
64 OperandMatchResultTy parseOperand(OperandVector &Operands, StringRef Name);
70 OperandMatchResultTy parseBranchModifiers(OperandVector &Operands);
387 OperandVector &Operands, in MatchAndEmitInstruction() argument
393 unsigned MatchResult = MatchInstructionImpl(Operands, Inst, ErrorInfo, in MatchAndEmitInstruction()
409 if (ErrorInfo >= Operands.size()) in MatchAndEmitInstruction()
412 ErrorLoc = ((SparcOperand &)*Operands[ErrorInfo]).getStartLoc(); in MatchAndEmitInstruction()
449 OperandVector &Operands) { in ParseInstruction() argument
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/external/llvm/lib/Target/Mips/AsmParser/
DMipsAsmParser.cpp124 OperandVector &Operands, MCStreamer &Out,
131 bool parseParenSuffix(StringRef Name, OperandVector &Operands);
133 bool parseBracketSuffix(StringRef Name, OperandVector &Operands);
136 SMLoc NameLoc, OperandVector &Operands) override;
140 MipsAsmParser::OperandMatchResultTy parseMemOperand(OperandVector &Operands);
143 matchAnyRegisterNameWithoutDollar(OperandVector &Operands,
147 matchAnyRegisterWithoutDollar(OperandVector &Operands, SMLoc S);
149 MipsAsmParser::OperandMatchResultTy parseAnyRegister(OperandVector &Operands);
151 MipsAsmParser::OperandMatchResultTy parseImm(OperandVector &Operands);
153 MipsAsmParser::OperandMatchResultTy parseJumpTarget(OperandVector &Operands);
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/external/llvm/lib/Transforms/IPO/
DArgumentPromotion.cpp471 IndicesVector Operands; in isSafeToPromoteArgument() local
474 Operands.clear(); in isSafeToPromoteArgument()
480 Operands.push_back(0); in isSafeToPromoteArgument()
497 Operands.push_back(C->getSExtValue()); in isSafeToPromoteArgument()
517 if (!PrefixIn(Operands, SafeToUnconditionallyLoad)) in isSafeToPromoteArgument()
523 if (ToPromote.find(Operands) == ToPromote.end()) { in isSafeToPromoteArgument()
532 ToPromote.insert(std::move(Operands)); in isSafeToPromoteArgument()
956 IndicesVector Operands; in DoPromotion() local
957 Operands.reserve(GEP->getNumIndices()); in DoPromotion()
960 Operands.push_back(cast<ConstantInt>(*II)->getSExtValue()); in DoPromotion()
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/external/llvm/lib/CodeGen/
DMachineInstr.cpp590 : MCID(&tid), Parent(nullptr), Operands(nullptr), NumOperands(0), Flags(0), in MachineInstr()
599 Operands = MF.allocateOperandArray(CapOperands); in MachineInstr()
609 : MCID(&MI.getDesc()), Parent(nullptr), Operands(nullptr), NumOperands(0), in MachineInstr()
616 Operands = MF.allocateOperandArray(CapOperands); in MachineInstr()
680 if (&Op >= Operands && &Op < Operands + NumOperands) { in addOperand()
698 while (OpNo && Operands[OpNo-1].isReg() && Operands[OpNo-1].isImplicit()) { in addOperand()
700 assert(!Operands[OpNo].isTied() && "Cannot move tied operands"); in addOperand()
719 MachineOperand *OldOperands = Operands; in addOperand()
722 Operands = MF.allocateOperandArray(CapOperands); in addOperand()
725 moveOperands(Operands, OldOperands, OpNo, MRI); in addOperand()
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