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Searched refs:X86 (Results 1 – 25 of 255) sorted by relevance

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/external/llvm/lib/Target/X86/
DX86InstrInfo.cpp105 (STI.isTarget64BitLP64() ? X86::ADJCALLSTACKDOWN64 : X86::ADJCALLSTACKDOWN32), in X86InstrInfo()
106 (STI.isTarget64BitLP64() ? X86::ADJCALLSTACKUP64 : X86::ADJCALLSTACKUP32)), in X86InstrInfo()
110 { X86::ADC32ri, X86::ADC32mi, 0 }, in X86InstrInfo()
111 { X86::ADC32ri8, X86::ADC32mi8, 0 }, in X86InstrInfo()
112 { X86::ADC32rr, X86::ADC32mr, 0 }, in X86InstrInfo()
113 { X86::ADC64ri32, X86::ADC64mi32, 0 }, in X86InstrInfo()
114 { X86::ADC64ri8, X86::ADC64mi8, 0 }, in X86InstrInfo()
115 { X86::ADC64rr, X86::ADC64mr, 0 }, in X86InstrInfo()
116 { X86::ADD16ri, X86::ADD16mi, 0 }, in X86InstrInfo()
117 { X86::ADD16ri8, X86::ADD16mi8, 0 }, in X86InstrInfo()
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DX86RegisterInfo.cpp58 : X86GenRegisterInfo((TT.isArch64Bit() ? X86::RIP : X86::EIP), in X86RegisterInfo()
61 (TT.isArch64Bit() ? X86::RIP : X86::EIP)) { in X86RegisterInfo()
77 StackPtr = Use64BitReg ? X86::RSP : X86::ESP; in X86RegisterInfo()
78 FramePtr = Use64BitReg ? X86::RBP : X86::EBP; in X86RegisterInfo()
79 BasePtr = Use64BitReg ? X86::RBX : X86::EBX; in X86RegisterInfo()
82 StackPtr = X86::ESP; in X86RegisterInfo()
83 FramePtr = X86::EBP; in X86RegisterInfo()
84 BasePtr = X86::ESI; in X86RegisterInfo()
104 if (!Is64Bit && Idx == X86::sub_8bit) in getSubClassWithSubReg()
105 Idx = X86::sub_8bit_hi; in getSubClassWithSubReg()
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DX86FloatingPoint.cpp126 if (Reg < X86::FP0 || Reg > X86::FP6) in calcLiveInMask()
128 Mask |= 1 << (Reg - X86::FP0); in calcLiveInMask()
194 return StackTop - 1 - getSlot(RegNo) + X86::ST0; in getSTReg()
223 BuildMI(*MBB, I, dl, TII->get(X86::XCH_F)).addReg(STReg); in moveToTop()
232 BuildMI(*MBB, I, dl, TII->get(X86::LD_Frr)).addReg(STReg); in duplicateToTop()
275 return X86::RFP80RegClass.contains(DstReg) || in isFPCopy()
276 X86::RFP80RegClass.contains(SrcReg); in isFPCopy()
291 assert(Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!"); in getFPReg()
292 return Reg - X86::FP0; in getFPReg()
303 static_assert(X86::FP6 == X86::FP0+6, "Register enums aren't sorted right!"); in runOnMachineFunction()
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DX86MCInstLower.cpp303 if (Reg != X86::AL && Reg != X86::AX && Reg != X86::EAX && Reg != X86::RAX) in SimplifyShortImmForm()
321 case X86::MOVSX16rr8: // movsbw %al, %ax --> cbtw in SimplifyMOVSX()
322 if (Op0 == X86::AX && Op1 == X86::AL) in SimplifyMOVSX()
323 NewOpcode = X86::CBW; in SimplifyMOVSX()
325 case X86::MOVSX32rr16: // movswl %ax, %eax --> cwtl in SimplifyMOVSX()
326 if (Op0 == X86::EAX && Op1 == X86::AX) in SimplifyMOVSX()
327 NewOpcode = X86::CWDE; in SimplifyMOVSX()
329 case X86::MOVSX64rr32: // movslq %eax, %rax --> cltq in SimplifyMOVSX()
330 if (Op0 == X86::RAX && Op1 == X86::EAX) in SimplifyMOVSX()
331 NewOpcode = X86::CDQE; in SimplifyMOVSX()
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DX86FrameLowering.cpp91 return X86::SUB64ri8; in getSUBriOpcode()
92 return X86::SUB64ri32; in getSUBriOpcode()
95 return X86::SUB32ri8; in getSUBriOpcode()
96 return X86::SUB32ri; in getSUBriOpcode()
103 return X86::ADD64ri8; in getADDriOpcode()
104 return X86::ADD64ri32; in getADDriOpcode()
107 return X86::ADD32ri8; in getADDriOpcode()
108 return X86::ADD32ri; in getADDriOpcode()
113 return isLP64 ? X86::SUB64rr : X86::SUB32rr; in getSUBrrOpcode()
117 return isLP64 ? X86::ADD64rr : X86::ADD32rr; in getADDrrOpcode()
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DX86FastISel.cpp166 bool foldX86XALUIntrinsic(X86::CondCode &CC, const Instruction *I,
172 static std::pair<X86::CondCode, bool>
174 X86::CondCode CC = X86::COND_INVALID; in getX86ConditionCode()
179 case CmpInst::FCMP_UEQ: CC = X86::COND_E; break; in getX86ConditionCode()
181 case CmpInst::FCMP_OGT: CC = X86::COND_A; break; in getX86ConditionCode()
183 case CmpInst::FCMP_OGE: CC = X86::COND_AE; break; in getX86ConditionCode()
185 case CmpInst::FCMP_ULT: CC = X86::COND_B; break; in getX86ConditionCode()
187 case CmpInst::FCMP_ULE: CC = X86::COND_BE; break; in getX86ConditionCode()
188 case CmpInst::FCMP_ONE: CC = X86::COND_NE; break; in getX86ConditionCode()
189 case CmpInst::FCMP_UNO: CC = X86::COND_P; break; in getX86ConditionCode()
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DX86ISelDAGToDAG.cpp96 return RegNode->getReg() == X86::RIP; in isRIPRelative()
605 if (!X86::isOffsetSuitableForCodeModel(Val, M, in FoldOffsetIntoAddress()
633 AM.Segment = CurDAG->getRegister(X86::GS, MVT::i16); in MatchLoadInAddress()
636 AM.Segment = CurDAG->getRegister(X86::FS, MVT::i16); in MatchLoadInAddress()
701 AM.setBaseReg(CurDAG->getRegister(X86::RIP, MVT::i64)); in MatchWrapper()
766 AM.Base_Reg = CurDAG->getRegister(X86::RIP, MVT::i64); in MatchAddress()
1343 AM.Segment = CurDAG->getRegister(X86::GS, MVT::i16); in SelectAddr()
1345 AM.Segment = CurDAG->getRegister(X86::FS, MVT::i16); in SelectAddr()
1454 CurDAG->getTargetConstant(X86::sub_32bit, MVT::i32)), in SelectLEA64_32Addr()
1468 CurDAG->getTargetConstant(X86::sub_32bit, MVT::i32)), in SelectLEA64_32Addr()
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/external/llvm/lib/Target/X86/Disassembler/
DX86Disassembler.cpp59 namespace X86 { namespace
84 (X86::Mode16Bit | X86::Mode32Bit | X86::Mode64Bit)) { in X86GenericDisassembler()
85 case X86::Mode16Bit: in X86GenericDisassembler()
88 case X86::Mode32Bit: in X86GenericDisassembler()
91 case X86::Mode64Bit: in X86GenericDisassembler()
175 #define ENTRY(x) X86::x, in translateRegister()
228 X86::CS,
229 X86::SS,
230 X86::DS,
231 X86::ES,
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/external/llvm/lib/Target/X86/MCTargetDesc/
DX86AsmBackend.cpp50 case X86::reloc_riprel_4byte: in getFixupKindLog2Size()
51 case X86::reloc_riprel_4byte_movq_load: in getFixupKindLog2Size()
52 case X86::reloc_signed_4byte: in getFixupKindLog2Size()
53 case X86::reloc_global_offset_table: in getFixupKindLog2Size()
60 case X86::reloc_global_offset_table8: in getFixupKindLog2Size()
89 return X86::NumTargetFixupKinds; in getNumFixupKinds()
93 const static MCFixupKindInfo Infos[X86::NumTargetFixupKinds] = { in getFixupKindInfo()
143 case X86::JAE_1: return X86::JAE_4; in getRelaxedOpcodeBranch()
144 case X86::JA_1: return X86::JA_4; in getRelaxedOpcodeBranch()
145 case X86::JBE_1: return X86::JBE_4; in getRelaxedOpcodeBranch()
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DX86BaseInfo.h27 namespace X86 {
723 if ((RegNo > X86::XMM7 && RegNo <= X86::XMM15) || in isX86_64ExtendedReg()
724 (RegNo > X86::XMM23 && RegNo <= X86::XMM31) || in isX86_64ExtendedReg()
725 (RegNo > X86::YMM7 && RegNo <= X86::YMM15) || in isX86_64ExtendedReg()
726 (RegNo > X86::YMM23 && RegNo <= X86::YMM31) || in isX86_64ExtendedReg()
727 (RegNo > X86::ZMM7 && RegNo <= X86::ZMM15) || in isX86_64ExtendedReg()
728 (RegNo > X86::ZMM23 && RegNo <= X86::ZMM31)) in isX86_64ExtendedReg()
733 case X86::R8: case X86::R9: case X86::R10: case X86::R11: in isX86_64ExtendedReg()
734 case X86::R12: case X86::R13: case X86::R14: case X86::R15: in isX86_64ExtendedReg()
735 case X86::R8D: case X86::R9D: case X86::R10D: case X86::R11D: in isX86_64ExtendedReg()
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/external/llvm/lib/Target/X86/InstPrinter/
DX86InstComments.cpp33 case X86::PMOVZXBWrm: in getZeroExtensionTypes()
34 case X86::PMOVZXBWrr: in getZeroExtensionTypes()
35 case X86::VPMOVZXBWrm: in getZeroExtensionTypes()
36 case X86::VPMOVZXBWrr: in getZeroExtensionTypes()
40 case X86::VPMOVZXBWYrm: in getZeroExtensionTypes()
41 case X86::VPMOVZXBWYrr: in getZeroExtensionTypes()
45 case X86::PMOVZXBDrm: in getZeroExtensionTypes()
46 case X86::PMOVZXBDrr: in getZeroExtensionTypes()
47 case X86::VPMOVZXBDrm: in getZeroExtensionTypes()
48 case X86::VPMOVZXBDrr: in getZeroExtensionTypes()
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/external/llvm/test/tools/llvm-readobj/
Dimports.test1 RUN: llvm-readobj --coff-imports %p/Inputs/imports.exe.coff-i386 | FileCheck -check-prefix=X86 %s
4 X86: Import {
5 X86-NEXT: Name: KERNEL32.dll
6 X86-NEXT: ImportLookupTableRVA: 0x2108
7 X86-NEXT: ImportAddressTableRVA: 0x2000
8 X86-NEXT: Symbol: ExitProcess (337)
9 X86-NEXT: Symbol: GetProcAddress (669)
10 X86-NEXT: Symbol: FreeLibrary (414)
11 X86-NEXT: Symbol: GetLastError (592)
12 X86-NEXT: Symbol: RaiseException (1087)
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Dprogram-headers.test4 RUN: | FileCheck %s -check-prefix ELF-X86-64
39 ELF-X86-64: ProgramHeaders [
40 ELF-X86-64-NEXT: ProgramHeader {
41 ELF-X86-64-NEXT: Type: PT_LOAD (0x1)
42 ELF-X86-64-NEXT: Offset: 0x0
43 ELF-X86-64-NEXT: VirtualAddress: 0x400000
44 ELF-X86-64-NEXT: PhysicalAddress: 0x400000
45 ELF-X86-64-NEXT: FileSize: 312
46 ELF-X86-64-NEXT: MemSize: 312
47 ELF-X86-64-NEXT: Flags [ (0x5)
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/external/llvm/test/Object/
Dobj2yaml.test2 RUN: obj2yaml %p/Inputs/trivial-object-test.coff-x86-64 | FileCheck %s --check-prefix COFF-X86-64
5 RUN: obj2yaml %p/Inputs/trivial-object-test.elf-x86-64 | FileCheck %s --check-prefix ELF-X86-64
7 RUN: | FileCheck %s --check-prefix ELF-X86-64-UNWIND
92 COFF-X86-64: header:
93 COFF-X86-64-NEXT: Machine: IMAGE_FILE_MACHINE_AMD64
95 COFF-X86-64: sections:
96 COFF-X86-64-NEXT: - Name: .text
97 COFF-X86-64-NEXT: Characteristics: [ IMAGE_SCN_CNT_CODE, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_R…
98 COFF-X86-64-NEXT: Alignment: 16
99 COFF-X86-64-NEXT: SectionData: 4883EC28C744242400000000488D0D00000000E800000000E8000000008B4424…
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/external/llvm/test/DebugInfo/COFF/
Dmultifunction.ll1 ; RUN: llc -mcpu=core2 -mtriple=i686-pc-win32 -O0 < %s | FileCheck --check-prefix=X86 %s
25 ; X86-LABEL: _x:
26 ; X86: # BB
27 ; X86-NEXT: [[X_CALL:.*]]:{{$}}
28 ; X86: calll _z
29 ; X86-NEXT: [[X_RETURN:.*]]:
30 ; X86: ret
31 ; X86-NEXT: L{{.*}}:
32 ; X86-NEXT: [[END_OF_X:.*]]:
34 ; X86-LABEL: _y:
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Dmultifile.ll1 ; RUN: llc -mcpu=core2 -mtriple=i686-pc-win32 -O0 < %s | FileCheck --check-prefix=X86 %s
19 ; X86-LABEL: _f:
20 ; X86: # BB
21 ; X86-NEXT: [[CALL_LINE_1:.*]]:{{$}}
22 ; X86: calll _g
23 ; X86-NEXT: [[CALL_LINE_2:.*]]:{{$}}
24 ; X86: calll _g
25 ; X86-NEXT: [[CALL_LINE_3:.*]]:{{$}}
26 ; X86: calll _g
27 ; X86-NEXT: [[RETURN_STMT:.*]]:
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Dsimple.ll1 ; RUN: llc -mcpu=core2 -mtriple=i686-pc-win32 -O0 < %s | FileCheck --check-prefix=X86 %s
14 ; X86-LABEL: _f:
15 ; X86: # BB
16 ; X86-NEXT: [[CALL_LINE:^L.*]]:{{$}}
17 ; X86: calll _g
18 ; X86-NEXT: [[RETURN_STMT:.*]]:
19 ; X86: ret
20 ; X86-NEXT: L{{.*}}:
21 ; X86-NEXT: [[END_OF_F:.*]]:
23 ; X86-LABEL: .section .debug$S,"dr"
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Dasm.ll1 ; RUN: llc -mcpu=core2 -mtriple=i686-pc-win32 -O0 < %s | FileCheck --check-prefix=X86 %s
15 ; X86-LABEL: _f:
16 ; X86: # BB
17 ; X86-NEXT: [[ASM_LINE:^L.*]]:{{$}}
18 ; X86: [[CALL_LINE:^L.*]]:{{$}}
19 ; X86: calll _g
20 ; X86-NEXT: [[RETURN_STMT:.*]]:
21 ; X86: ret
22 ; X86-NEXT: L{{.*}}:
23 ; X86-NEXT: [[END_OF_F:^L.*]]:
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/external/llvm/test/CodeGen/X86/
Dimul.ll3 ; RUN: llc < %s -mtriple=i686-pc-linux | FileCheck %s --check-prefix=X86
8 ; X86-LABEL: mul4_32:
9 ; X86: shll
17 ; X86-LABEL: mul4_64:
18 ; X86: shldl
19 ; X86: shll
27 ; X86-LABEL: mul4096_32:
28 ; X86: shll
36 ; X86-LABEL: mul4096_64:
37 ; X86: shldl
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Dvec_insert-mmx.ll1 ; RUN: llc < %s -mtriple=i686-darwin -mattr=+mmx,+sse2 | FileCheck %s -check-prefix=X86-32
2 ; RUN: llc < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse4.1 | FileCheck %s -check-prefix=X86-64
6 ; X86-32-LABEL: t0:
7 ; X86-32: ## BB#0:
8 ; X86-32: movd {{[0-9]+}}(%esp), %xmm0
9 ; X86-32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,1,1]
10 ; X86-32-NEXT: movq %xmm0, (%esp)
11 ; X86-32-NEXT: movq (%esp), %mm0
12 ; X86-32-NEXT: addl $12, %esp
13 ; X86-32-NEXT: retl
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Dmmx-arg-passing.ll1 ; RUN: llc < %s -mtriple=i386-apple-darwin -mattr=+mmx | FileCheck %s --check-prefix=X86-32
2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86-64
13 ; X86-32-LABEL: t1:
14 ; X86-32: ## BB#0:
15 ; X86-32-NEXT: movl L_u1$non_lazy_ptr, %eax
16 ; X86-32-NEXT: movq %mm0, (%eax)
17 ; X86-32-NEXT: retl
19 ; X86-64-LABEL: t1:
20 ; X86-64: ## BB#0:
21 ; X86-64-NEXT: movdq2q %xmm0, %mm0
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Dh-registers-0.ll1 ; RUN: llc < %s -mattr=-bmi -mtriple=x86_64-linux | FileCheck %s -check-prefix=X86-64
3 ; RUN: llc < %s -mattr=-bmi -march=x86 | FileCheck %s -check-prefix=X86-32
9 ; X86-64-LABEL: bar64:
10 ; X86-64: shrq $8, %rdi
11 ; X86-64: incb %dil
19 ; X86-32-LABEL: bar64:
20 ; X86-32: incb %ah
29 ; X86-64-LABEL: bar32:
30 ; X86-64: shrl $8, %edi
31 ; X86-64: incb %dil
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Dmmx-arg-passing-x86-64.ll1 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+mmx,+sse2 | FileCheck %s --check-prefix=X86-64
9 ; X86-64-LABEL: t3:
10 ; X86-64: ## BB#0:
11 ; X86-64-NEXT: movq _g_v8qi@{{.*}}(%rip), %rax
12 ; X86-64-NEXT: movq {{.*#+}} xmm0 = mem[0],zero
13 ; X86-64-NEXT: movb $1, %al
14 ; X86-64-NEXT: jmp _pass_v8qi ## TAILCALL
22 ; X86-64-LABEL: t4:
23 ; X86-64: ## BB#0:
24 ; X86-64-NEXT: movdq2q %xmm1, %mm0
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/external/llvm/lib/Target/X86/AsmParser/
DX86AsmInstrumentation.cpp118 bool IsStackReg(unsigned Reg) { return Reg == X86::RSP || Reg == X86::ESP; } in IsStackReg()
158 if (Reg != X86::NoRegister) in AddBusyReg()
168 static const MCPhysReg Candidates[] = { X86::RBP, X86::RAX, X86::RBX, in ChooseFrameReg()
169 X86::RCX, X86::RDX, X86::RDI, in ChooseFrameReg()
170 X86::RSI }; in ChooseFrameReg()
175 return X86::NoRegister; in ChooseFrameReg()
180 return Reg == X86::NoRegister ? Reg : getX86SubSuperRegister(Reg, VT); in convReg()
199 EmitInstruction(Out, MCInstBuilder(X86::REP_PREFIX)); in InstrumentAndEmitInstruction()
203 RepPrefix = (Inst.getOpcode() == X86::REP_PREFIX); in InstrumentAndEmitInstruction()
248 Inst.setOpcode(VT == MVT::i32 ? X86::LEA32r : X86::LEA64r); in EmitLEA()
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DX86Operand.h236 getMemIndexReg() >= X86::XMM0 && getMemIndexReg() <= X86::XMM15; in isMemVX32()
240 getMemIndexReg() >= X86::YMM0 && getMemIndexReg() <= X86::YMM15; in isMemVY32()
244 getMemIndexReg() >= X86::XMM0 && getMemIndexReg() <= X86::XMM15; in isMemVX64()
248 getMemIndexReg() >= X86::YMM0 && getMemIndexReg() <= X86::YMM15; in isMemVY64()
252 getMemIndexReg() >= X86::ZMM0 && getMemIndexReg() <= X86::ZMM31; in isMemVZ32()
256 getMemIndexReg() >= X86::ZMM0 && getMemIndexReg() <= X86::ZMM31; in isMemVZ64()
273 (getMemBaseReg() == X86::RSI || getMemBaseReg() == X86::ESI || in isSrcIdx()
274 getMemBaseReg() == X86::SI) && isa<MCConstantExpr>(getMemDisp()) && in isSrcIdx()
292 (getMemSegReg() == 0 || getMemSegReg() == X86::ES) && in isDstIdx()
293 (getMemBaseReg() == X86::RDI || getMemBaseReg() == X86::EDI || in isDstIdx()
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