/external/llvm/include/llvm/Target/ |
D | TargetInstrInfo.h | 217 virtual bool isAsCheapAsAMove(const MachineInstr *MI) const { in isAsCheapAsAMove() function 218 return MI->isAsCheapAsAMove(); in isAsCheapAsAMove()
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D | Target.td | 384 bit isAsCheapAsAMove = 0; // As cheap (or cheaper) than a move instruction. 790 let isAsCheapAsAMove = 1; 803 let isAsCheapAsAMove = 1; 816 let isAsCheapAsAMove = 1; 823 let isAsCheapAsAMove = 1;
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/external/llvm/include/llvm/MC/ |
D | MCInstrDesc.h | 518 bool isAsCheapAsAMove() const { in isAsCheapAsAMove() function
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.h | 50 bool isAsCheapAsAMove(const MachineInstr *MI) const override;
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D | AArch64InstrInfo.cpp | 548 bool AArch64InstrInfo::isAsCheapAsAMove(const MachineInstr *MI) const { in isAsCheapAsAMove() function in AArch64InstrInfo 550 return MI->isAsCheapAsAMove(); in isAsCheapAsAMove()
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/external/llvm/utils/TableGen/ |
D | CodeGenInstruction.h | 250 bool isAsCheapAsAMove : 1; variable
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D | InstrInfoEmitter.cpp | 507 if (Inst.isAsCheapAsAMove) OS << "|(1<<MCID::CheapAsAMove)"; in emitRecord()
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D | CodeGenInstruction.cpp | 332 isAsCheapAsAMove = R->getValueAsBit("isAsCheapAsAMove"); in CodeGenInstruction()
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/external/llvm/lib/CodeGen/ |
D | LiveRangeEdit.cpp | 136 if (cheapAsAMove && !TII.isAsCheapAsAMove(RM.OrigMI)) in canRematerializeAt()
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D | MachineSink.cpp | 346 if (!MI->isCopy() && !TII->isAsCheapAsAMove(MI)) in isWorthBreakingCriticalEdge()
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D | MachineCSE.cpp | 391 if (TII->isAsCheapAsAMove(MI)) { in isProfitableToCSE()
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D | MachineLICM.cpp | 1079 if (TII->isAsCheapAsAMove(&MI) || MI.isCopyLike()) in IsCheapInstruction()
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D | RegisterCoalescer.cpp | 878 if (!TII->isAsCheapAsAMove(DefMI)) in reMaterializeTrivialDef()
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/external/llvm/lib/Target/BPF/ |
D | BPFInstrInfo.td | 183 let isAsCheapAsAMove = 1 in { 257 let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
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/external/llvm/include/llvm/CodeGen/ |
D | MachineInstr.h | 664 bool isAsCheapAsAMove(QueryType Type = AllInBundle) const {
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/external/llvm/lib/Target/NVPTX/ |
D | NVPTXVector.td | 24 let isAsCheapAsAMove=1, VecInstType=isVecExtract.Value in { 106 let isAsCheapAsAMove=1, VecInstType=isVecInsert.Value in { 819 let isAsCheapAsAMove=1, VecInstType=isVecBuild.Value in { 850 let isAsCheapAsAMove=1, hasSideEffects=0, IsSimpleMove=1,
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZInstrInfo.td | 299 let hasSideEffects = 0, isAsCheapAsAMove = 1, isMoveImm = 1, 579 let hasSideEffects = 0, isAsCheapAsAMove = 1, isReMaterializable = 1, 593 let hasSideEffects = 0, isAsCheapAsAMove = 1, isMoveImm = 1, 682 let isAsCheapAsAMove = 1, isMoveImm = 1, isReMaterializable = 1 in {
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D | SystemZInstrFP.td | 29 let hasSideEffects = 0, isAsCheapAsAMove = 1, isMoveImm = 1 in {
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/external/llvm/lib/Target/Hexagon/ |
D | HexagonInstrInfo.td | 327 let isReMaterializable = 1, isMoveImm = 1, isAsCheapAsAMove = 1, 622 isAsCheapAsAMove = 1 , opExtendable = 1, opExtentBits = 16, isMoveImm = 1, 641 let isReMaterializable = 1, isMoveImm = 1, isAsCheapAsAMove = 1, 3963 let isReMaterializable = 1, isAsCheapAsAMove = 1 in { 3971 let isReMaterializable = 1, isAsCheapAsAMove = 1 in { 4530 let isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1,
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/external/llvm/lib/Target/X86/ |
D | X86InstrCompiler.td | 249 let Defs = [EFLAGS], isReMaterializable = 1, isAsCheapAsAMove = 1, 265 let AddedComplexity = 1, isReMaterializable = 1, isAsCheapAsAMove = 1,
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/external/llvm/lib/Target/R600/ |
D | R600Instructions.td | 1369 let isAsCheapAsAMove = 1;
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/external/llvm/lib/Target/MSP430/ |
D | MSP430InstrInfo.td | 253 let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
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/external/llvm/lib/Target/PowerPC/ |
D | PPCInstrQPX.td | 439 let isReMaterializable = 1, isAsCheapAsAMove = 1 in
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D | PPCInstr64Bit.td | 393 let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in {
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrThumb2.td | 1877 let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1, 1901 let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in 2477 let isAsCheapAsAMove = Cheap;
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