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Searched refs:isAsCheapAsAMove (Results 1 – 25 of 35) sorted by relevance

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/external/llvm/include/llvm/Target/
DTargetInstrInfo.h217 virtual bool isAsCheapAsAMove(const MachineInstr *MI) const { in isAsCheapAsAMove() function
218 return MI->isAsCheapAsAMove(); in isAsCheapAsAMove()
DTarget.td384 bit isAsCheapAsAMove = 0; // As cheap (or cheaper) than a move instruction.
790 let isAsCheapAsAMove = 1;
803 let isAsCheapAsAMove = 1;
816 let isAsCheapAsAMove = 1;
823 let isAsCheapAsAMove = 1;
/external/llvm/include/llvm/MC/
DMCInstrDesc.h518 bool isAsCheapAsAMove() const { in isAsCheapAsAMove() function
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.h50 bool isAsCheapAsAMove(const MachineInstr *MI) const override;
DAArch64InstrInfo.cpp548 bool AArch64InstrInfo::isAsCheapAsAMove(const MachineInstr *MI) const { in isAsCheapAsAMove() function in AArch64InstrInfo
550 return MI->isAsCheapAsAMove(); in isAsCheapAsAMove()
/external/llvm/utils/TableGen/
DCodeGenInstruction.h250 bool isAsCheapAsAMove : 1; variable
DInstrInfoEmitter.cpp507 if (Inst.isAsCheapAsAMove) OS << "|(1<<MCID::CheapAsAMove)"; in emitRecord()
DCodeGenInstruction.cpp332 isAsCheapAsAMove = R->getValueAsBit("isAsCheapAsAMove"); in CodeGenInstruction()
/external/llvm/lib/CodeGen/
DLiveRangeEdit.cpp136 if (cheapAsAMove && !TII.isAsCheapAsAMove(RM.OrigMI)) in canRematerializeAt()
DMachineSink.cpp346 if (!MI->isCopy() && !TII->isAsCheapAsAMove(MI)) in isWorthBreakingCriticalEdge()
DMachineCSE.cpp391 if (TII->isAsCheapAsAMove(MI)) { in isProfitableToCSE()
DMachineLICM.cpp1079 if (TII->isAsCheapAsAMove(&MI) || MI.isCopyLike()) in IsCheapInstruction()
DRegisterCoalescer.cpp878 if (!TII->isAsCheapAsAMove(DefMI)) in reMaterializeTrivialDef()
/external/llvm/lib/Target/BPF/
DBPFInstrInfo.td183 let isAsCheapAsAMove = 1 in {
257 let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
/external/llvm/include/llvm/CodeGen/
DMachineInstr.h664 bool isAsCheapAsAMove(QueryType Type = AllInBundle) const {
/external/llvm/lib/Target/NVPTX/
DNVPTXVector.td24 let isAsCheapAsAMove=1, VecInstType=isVecExtract.Value in {
106 let isAsCheapAsAMove=1, VecInstType=isVecInsert.Value in {
819 let isAsCheapAsAMove=1, VecInstType=isVecBuild.Value in {
850 let isAsCheapAsAMove=1, hasSideEffects=0, IsSimpleMove=1,
/external/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.td299 let hasSideEffects = 0, isAsCheapAsAMove = 1, isMoveImm = 1,
579 let hasSideEffects = 0, isAsCheapAsAMove = 1, isReMaterializable = 1,
593 let hasSideEffects = 0, isAsCheapAsAMove = 1, isMoveImm = 1,
682 let isAsCheapAsAMove = 1, isMoveImm = 1, isReMaterializable = 1 in {
DSystemZInstrFP.td29 let hasSideEffects = 0, isAsCheapAsAMove = 1, isMoveImm = 1 in {
/external/llvm/lib/Target/Hexagon/
DHexagonInstrInfo.td327 let isReMaterializable = 1, isMoveImm = 1, isAsCheapAsAMove = 1,
622 isAsCheapAsAMove = 1 , opExtendable = 1, opExtentBits = 16, isMoveImm = 1,
641 let isReMaterializable = 1, isMoveImm = 1, isAsCheapAsAMove = 1,
3963 let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
3971 let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
4530 let isMoveImm = 1, isAsCheapAsAMove = 1, isReMaterializable = 1,
/external/llvm/lib/Target/X86/
DX86InstrCompiler.td249 let Defs = [EFLAGS], isReMaterializable = 1, isAsCheapAsAMove = 1,
265 let AddedComplexity = 1, isReMaterializable = 1, isAsCheapAsAMove = 1,
/external/llvm/lib/Target/R600/
DR600Instructions.td1369 let isAsCheapAsAMove = 1;
/external/llvm/lib/Target/MSP430/
DMSP430InstrInfo.td253 let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
/external/llvm/lib/Target/PowerPC/
DPPCInstrQPX.td439 let isReMaterializable = 1, isAsCheapAsAMove = 1 in
DPPCInstr64Bit.td393 let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in {
/external/llvm/lib/Target/ARM/
DARMInstrThumb2.td1877 let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1,
1901 let isReMaterializable = 1, isAsCheapAsAMove = 1, isMoveImm = 1 in
2477 let isAsCheapAsAMove = Cheap;

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