| /external/llvm/lib/CodeGen/ |
| D | ProcessImplicitDefs.cpp | 72 if (MO->isReg() && MO->isUse() && MO->readsReg()) in canTurnIntoImplicitDef()
112 if (MO->isUse()) in processImplicitDef()
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| D | ExpandPostRAPseudos.cpp | 74 if (!MO.isReg() || !MO.isImplicit() || MO.isUse()) in TransferImplicitDefs()
84 (MI->getOperand(2).isReg() && MI->getOperand(2).isUse()) && in LowerSubregToReg()
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| D | MachineInstr.cpp | 316 if (isUndef() && isUse()) { in print()
756 if (NewMO->isUse()) { in addOperand()
1041 if (getOperand(OpIdx).isUse() && isRegTiedToDefOperand(OpIdx, &DefIdx)) in getRegClassConstraint()
1126 if (!MO.isReg() || !MO.isUse()) in findRegisterUseOperandIdx()
1158 if (MO.isUse()) in readsWritesVirtualRegister()
1238 assert(UseMO.isUse() && "UseIdx must be a use operand"); in tieOperands()
1270 if (MO.isUse()) in findTiedOperandIdx()
1275 if (UseMO.isReg() && UseMO.isUse() && UseMO.TiedTo == OpIdx + 1) in findTiedOperandIdx()
1318 if (MO.isReg() && MO.isUse()) in clearKillInfo()
1480 if (!MO.isReg() || MO.isUse()) in allDefsAreDead()
[all …]
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| D | RegisterScavenging.cpp | 134 if (MO.isUse()) { in determineKillsAndDefs()
205 if (MO.isUse()) { in forward()
377 if (MO.isReg() && MO.getReg() != 0 && !(MO.isUse() && MO.isUndef()) && in scavengeRegister()
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| D | TwoAddressInstructionPass.cpp | 205 if (MO.isUse() && MOReg != SavedReg) in sink3AddrInstruction()
369 if (MO.isUse() && DI->second < LastUse) in noUseAfterLastDef()
480 if (!MO.isReg() || !MO.isUse() || MO.getReg() != Reg) in isTwoAddrUse()
1063 if (MO.isUse()) { in rescheduleKillAboveMI()
1104 if (MO.isUse()) { in rescheduleKillAboveMI()
1309 if (MO.isUse()) { in tryInstructionTransform()
1389 assert(SrcReg && SrcMO.isUse() && "two address instruction invalid"); in collectTiedOperands()
1502 assert(MO.isReg() && MO.getReg() == RegB && MO.isUse() && in processTiedPairs()
1530 MO.isUse()) { in processTiedPairs()
1567 if (MO.isReg() && MO.getReg() == RegB && MO.isUse()) { in processTiedPairs()
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| D | RegAllocFast.cpp | 236 if (MO.isUse() && !LR.LastUse->isRegTiedToDefOperand(LR.LastOpNum)) { in addKillFlag()
610 if (LRI->LastUse != MI || LRI->LastUse->getOperand(LRI->LastOpNum).isUse()) in defineVirtReg()
642 if (MO.isUse()) in reloadVirtReg()
742 if (MO.isUse()) { in handleThroughOperands()
932 if (MO.isUse()) { in AllocateBasicBlock()
944 if (MO.isUse()) { in AllocateBasicBlock()
980 if (MO.isUse()) { in AllocateBasicBlock()
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| D | LivePhysRegs.cpp | 80 assert(O->isUse()); in stepForward()
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| D | MachineSink.cpp | 354 if (!MO.isReg() || !MO.isUse()) in isWorthBreakingCriticalEdge()
538 if (MO.isUse()) { in FindSuccToSinkTo()
550 if (MO.isUse()) continue; in FindSuccToSinkTo()
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| D | CriticalAntiDepBreaker.cpp | 228 if (MO.isUse() && Special) { in PrescanInstruction()
292 if (!MO.isUse()) continue; in ScanInstruction()
603 if (MO.isUse() && TRI->regsOverlap(AntiDepReg, Reg)) { in BreakAntiDependencies()
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| D | MachineCSE.cpp | 127 if (!MO.isReg() || !MO.isUse()) in INITIALIZE_PASS_DEPENDENCY()
197 if (MO.isUse()) in isPhysDefTriviallyDead()
403 if (MO.isReg() && MO.isUse() && in isProfitableToCSE()
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| D | LiveIntervalAnalysis.cpp | 737 if (MO.isUse()) { in addKillFlags()
811 LiveIntervals::getSpillWeight(bool isDef, bool isUse, in getSpillWeight() argument
816 return (isDef + isUse) * (Freq.getFrequency() * Scale); in getSpillWeight()
937 if (MO->isUse()) in updateAllRanges()
1032 if (MO->isReg() && MO->isUse()) in handleMoveDown()
1329 } else if (MO.isUse()) { in repairOldRegInRange()
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| D | DeadMachineInstructionElim.cpp | 163 if (MO.isReg() && MO.isUse()) { in runOnMachineFunction()
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| D | TargetInstrInfo.cpp | 520 assert(MI->getOperand(Ops[i]).isUse() && "Folding load into def!"); in foldMemoryOperand()
612 if (MO.isUse()) { in isReallyTriviallyReMaterializableGeneric()
633 if (MO.isUse()) in isReallyTriviallyReMaterializableGeneric()
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| D | BranchFolding.cpp | 168 if (!MO.isReg() || !MO.isUse()) in OptimizeImpDefsBlock()
1627 if (MO.isUse()) { in findHoistingInsertPosAndDeps()
1661 if (!MO.isReg() || MO.isUse()) in findHoistingInsertPosAndDeps()
1695 if (MO.isUse()) { in findHoistingInsertPosAndDeps()
1826 if (!MO.isReg() || !MO.isUse() || !MO.isKill()) in HoistCommonCodeInSuccs()
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| D | InlineSpiller.cpp | 874 if (MO.isReg() && MO.isUse() && MO.getReg() == VirtReg.reg) in reMaterializeFor()
925 if (MO.isReg() && MO.isUse() && MO.getReg() == VirtReg.reg) { in reMaterializeFor()
1137 if (MO->isUse()) in foldMemoryOperand()
1306 if (MO.isUse()) { in spillAroundUses()
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| /external/llvm/lib/Target/Sparc/ |
| D | DelaySlotFiller.cpp | 263 if (MO.isUse()) { in delayHasHazard()
288 assert(Reg.isUse() && "CALL first operand is not a use."); in insertCallDefsUses()
295 assert(RegOrImm.isUse() && "CALLrr second operand is not a use."); in insertCallDefsUses()
316 if (MO.isUse()) { in insertDefsUses()
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| /external/llvm/lib/Target/R600/ |
| D | SIInsertWaits.cpp | 220 if (I->isReg() && I->isUse()) in isOpRelevant()
306 if (Op.isUse()) in pushInstruction()
406 if (Op.isUse()) in handleOperands()
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| /external/llvm/include/llvm/CodeGen/ |
| D | MachineRegisterInfo.h | 813 if ((!ReturnUses && op->isUse()) || in defusechain_iterator()
828 if (Op->isUse()) in advance()
915 if ((!ReturnUses && op->isUse()) || in defusechain_instr_iterator()
930 if (Op->isUse()) in advance()
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| D | MachineOperand.h | 274 bool isUse() const { in isUse() function
333 return !isUndef() && !isInternalRead() && (isUse() || getSubReg()); in readsReg()
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| D | LiveIntervalAnalysis.h | 106 static float getSpillWeight(bool isDef, bool isUse,
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonNewValueJump.cpp | 151 (II->getOperand(i).isUse() || II->getOperand(i).isDef())) { in INITIALIZE_PASS_DEPENDENCY()
565 if (MO.isReg() && MO.isUse()) { in runOnMachineFunction()
572 if (localMO.isReg() && localMO.isUse() && in runOnMachineFunction()
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| D | HexagonExpandCondsets.cpp | 268 if (!Op.isReg() || !Op.isUse() || Op.getReg() != Reg) in makeDefined()
357 if (!Op.isReg() || !Op.isUse() || Op.getReg() != Reg) in updateKillFlags()
505 if (!Op.isReg() || !Op.isUse() || Op.isImplicit() || Op.isUndef()) in addInstrToLiveness()
622 if (!Op.isReg() || !Op.isUse()) in removeInstrFromLiveness()
1106 if (MO.isReg() && MO.isUse() && MO.isImplicit()) in removeImplicitUses()
1133 if (MO.isReg() && MO.isUse() && MO.isImplicit() && MO.isUndef()) { in postprocessUndefImplicitUses()
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| /external/llvm/lib/Target/Mips/ |
| D | MipsOptimizePICCall.cpp | 110 if (!MO.isReg() || !MO.isUse() || in getCallTargetRegOpnd()
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| /external/llvm/lib/Target/ARM/ |
| D | Thumb2ITBlockPass.cpp | 70 if (MO.isUse()) in TrackDefUses()
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| D | A15SDOptimizer.cpp | 199 if ((!MO.isReg()) || (!MO.isUse())) in eraseInstrWithNoUses()
416 if (!MO.isReg() || !MO.isUse()) in getReadDPRs()
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