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Searched refs:rl_src1 (Results 1 – 14 of 14) sorted by relevance

/art/compiler/dex/quick/arm64/
Dfp_arm64.cc27 RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpFloat() argument
51 CallRuntimeHelperRegLocationRegLocation(kQuickFmodf, rl_src1, rl_src2, false); in GenArithOpFloat()
56 GenNegFloat(rl_dest, rl_src1); in GenArithOpFloat()
61 rl_src1 = LoadValue(rl_src1, kFPReg); in GenArithOpFloat()
64 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpFloat()
69 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpDouble() argument
95 LoadValueDirectWideFixed(rl_src1, rs_d0); in GenArithOpDouble()
104 GenNegDouble(rl_dest, rl_src1); in GenArithOpDouble()
110 rl_src1 = LoadValueWide(rl_src1, kFPReg); in GenArithOpDouble()
111 DCHECK(rl_src1.wide); in GenArithOpDouble()
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Dint_arm64.cc57 void Arm64Mir2Lir::GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, in GenCmpLong() argument
60 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenCmpLong()
64 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg); in GenCmpLong()
72 RegLocation rl_src1, RegLocation rl_shift) { in GenShiftOpLong() argument
91 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenShiftOpLong()
93 OpRegRegReg(op, rl_result.reg, rl_src1.reg, As64BitReg(rl_shift.reg)); in GenShiftOpLong()
224 RegLocation rl_src1 = mir_graph_->GetSrcWide(mir, 0); in GenFusedLongCmpBranch() local
230 if (rl_src1.is_const) { in GenFusedLongCmpBranch()
231 std::swap(rl_src1, rl_src2); in GenFusedLongCmpBranch()
235 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenFusedLongCmpBranch()
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Dcodegen_arm64.h61 void GenMultiplyByConstantFloat(RegLocation rl_dest, RegLocation rl_src1,
63 void GenMultiplyByConstantDouble(RegLocation rl_dest, RegLocation rl_src1,
131 void GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
133 void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
139 void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
141 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
143 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
145 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
165 void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
171 void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) OVERRIDE;
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/art/compiler/dex/quick/arm/
Dfp_arm.cc27 RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpFloat() argument
55 CallRuntimeHelperRegLocationRegLocation(kQuickFmodf, rl_src1, rl_src2, false); in GenArithOpFloat()
60 GenNegFloat(rl_dest, rl_src1); in GenArithOpFloat()
65 rl_src1 = LoadValue(rl_src1, kFPReg); in GenArithOpFloat()
68 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpFloat()
73 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpDouble() argument
97 CallRuntimeHelperRegLocationRegLocation(kQuickFmod, rl_src1, rl_src2, false); in GenArithOpDouble()
102 GenNegDouble(rl_dest, rl_src1); in GenArithOpDouble()
108 rl_src1 = LoadValueWide(rl_src1, kFPReg); in GenArithOpDouble()
109 DCHECK(rl_src1.wide); in GenArithOpDouble()
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Dint_arm.cc133 void ArmMir2Lir::GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenCmpLong() argument
136 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenCmpLong()
140 OpRegReg(kOpCmp, rl_src1.reg.GetHigh(), rl_src2.reg.GetHigh()); in GenCmpLong()
143 OpRegRegReg(kOpSub, t_reg, rl_src1.reg.GetLow(), rl_src2.reg.GetLow()); in GenCmpLong()
166 void ArmMir2Lir::GenFusedLongCmpImmBranch(BasicBlock* bb, RegLocation rl_src1, in GenFusedLongCmpImmBranch() argument
174 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenFusedLongCmpImmBranch()
175 RegStorage low_reg = rl_src1.reg.GetLow(); in GenFusedLongCmpImmBranch()
176 RegStorage high_reg = rl_src1.reg.GetHigh(); in GenFusedLongCmpImmBranch()
319 RegLocation rl_src1 = mir_graph_->GetSrcWide(mir, 0); in GenFusedLongCmpBranch() local
323 if (rl_src1.is_const) { in GenFusedLongCmpBranch()
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Dcodegen_arm.h65 void GenMultiplyByConstantFloat(RegLocation rl_dest, RegLocation rl_src1,
67 void GenMultiplyByConstantDouble(RegLocation rl_dest, RegLocation rl_src1,
143 void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
146 RegLocation rl_src1, RegLocation rl_src2, int flags);
152 RegLocation rl_src1, RegLocation rl_shift, int flags);
153 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
155 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
157 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
170 void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
193 void GenMaddMsubInt(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2,
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/art/compiler/dex/quick/mips/
Dfp_mips.cc27 RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpFloat() argument
55 CallRuntimeHelperRegLocationRegLocation(kQuickFmodf, rl_src1, rl_src2, false); in GenArithOpFloat()
60 GenNegFloat(rl_dest, rl_src1); in GenArithOpFloat()
65 rl_src1 = LoadValue(rl_src1, kFPReg); in GenArithOpFloat()
68 NewLIR3(op, rl_result.reg.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenArithOpFloat()
73 RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpDouble() argument
97 CallRuntimeHelperRegLocationRegLocation(kQuickFmod, rl_src1, rl_src2, false); in GenArithOpDouble()
102 GenNegDouble(rl_dest, rl_src1); in GenArithOpDouble()
107 rl_src1 = LoadValueWide(rl_src1, kFPReg); in GenArithOpDouble()
108 DCHECK(rl_src1.wide); in GenArithOpDouble()
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Dint_mips.cc53 void MipsMir2Lir::GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenCmpLong() argument
54 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenCmpLong()
59 NewLIR3(kMipsSlt, temp.GetReg(), rl_src1.reg.GetReg(), rl_src2.reg.GetReg()); in GenCmpLong()
60 NewLIR3(kMipsSlt, rl_result.reg.GetReg(), rl_src2.reg.GetReg(), rl_src1.reg.GetReg()); in GenCmpLong()
68 NewLIR3(kMipsSlt, t0.GetReg(), rl_src1.reg.GetHighReg(), rl_src2.reg.GetHighReg()); in GenCmpLong()
69 NewLIR3(kMipsSlt, t1.GetReg(), rl_src2.reg.GetHighReg(), rl_src1.reg.GetHighReg()); in GenCmpLong()
72 NewLIR3(kMipsSltu, t0.GetReg(), rl_src1.reg.GetLowReg(), rl_src2.reg.GetLowReg()); in GenCmpLong()
73 NewLIR3(kMipsSltu, t1.GetReg(), rl_src2.reg.GetLowReg(), rl_src1.reg.GetLowReg()); in GenCmpLong()
330 RegLocation MipsMir2Lir::GenDivRem(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2, in GenDivRem() argument
332 UNUSED(rl_dest, rl_src1, rl_src2, is_div, flags); in GenDivRem()
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Dcodegen_mips.h76 void GenMultiplyByConstantFloat(RegLocation rl_dest, RegLocation rl_src1, int32_t constant)
78 void GenMultiplyByConstantDouble(RegLocation rl_dest, RegLocation rl_src1, int64_t constant)
142 void GenShiftOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
144 void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
150 void GenShiftImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
152 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
154 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
156 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
167 void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
171 void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
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/art/compiler/dex/quick/x86/
Dfp_x86.cc27 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpFloat() argument
54 GenRemFP(rl_dest, rl_src1, rl_src2, false /* is_double */); in GenArithOpFloat()
57 GenNegFloat(rl_dest, rl_src1); in GenArithOpFloat()
62 rl_src1 = LoadValue(rl_src1, kFPReg); in GenArithOpFloat()
66 RegStorage r_src1 = rl_src1.reg; in GenArithOpFloat()
78 RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) { in GenArithOpDouble() argument
81 DCHECK(rl_src1.wide); in GenArithOpDouble()
82 DCHECK(rl_src1.fp); in GenArithOpDouble()
107 GenRemFP(rl_dest, rl_src1, rl_src2, true /* is_double */); in GenArithOpDouble()
110 GenNegDouble(rl_dest, rl_src1); in GenArithOpDouble()
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Dint_x86.cc37 void X86Mir2Lir::GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, in GenCmpLong() argument
40 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenCmpLong()
44 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg); in GenCmpLong()
59 LoadValueDirectWideFixed(rl_src1, r_tmp1); in GenCmpLong()
390 RegLocation rl_src1 = mir_graph_->GetSrcWide(mir, 0); in GenFusedLongCmpBranch() local
394 if (rl_src1.is_const) { in GenFusedLongCmpBranch()
395 std::swap(rl_src1, rl_src2); in GenFusedLongCmpBranch()
401 GenFusedLongCmpImmBranch(bb, rl_src1, val, ccode); in GenFusedLongCmpBranch()
406 rl_src1 = LoadValueWide(rl_src1, kCoreReg); in GenFusedLongCmpBranch()
409 OpRegReg(kOpCmp, rl_src1.reg, rl_src2.reg); in GenFusedLongCmpBranch()
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Dcodegen_x86.h86 void GenMultiplyByConstantFloat(RegLocation rl_dest, RegLocation rl_src1,
88 void GenMultiplyByConstantDouble(RegLocation rl_dest, RegLocation rl_src1,
180 void GenArithOpDouble(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
182 void GenArithOpFloat(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
184 void GenCmpFP(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
200 void GenArithOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
202 void GenArithImmOpLong(Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1,
205 RegLocation rl_src1, RegLocation rl_shift, int flags) OVERRIDE;
206 void GenCmpLong(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) OVERRIDE;
209 RegLocation rl_src1, RegLocation rl_shift) OVERRIDE;
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/art/compiler/dex/quick/
Dgen_common.cc349 void Mir2Lir::GenCompareAndBranch(Instruction::Code opcode, RegLocation rl_src1, in GenCompareAndBranch() argument
352 RegisterClass reg_class = (rl_src1.ref || rl_src2.ref) ? kRefReg : kCoreReg; in GenCompareAndBranch()
378 if (rl_src1.is_const) { in GenCompareAndBranch()
379 RegLocation rl_temp = rl_src1; in GenCompareAndBranch()
380 rl_src1 = rl_src2; in GenCompareAndBranch()
385 rl_src1 = LoadValue(rl_src1, reg_class); in GenCompareAndBranch()
394 OpCmpImmBranch(cond, rl_src1.reg, mir_graph_->ConstantValue(rl_src2), taken); in GenCompareAndBranch()
404 OpCmpImmBranch(cond, rl_src1.reg, 0, taken); in GenCompareAndBranch()
410 OpCmpBranch(cond, rl_src1.reg, rl_src2.reg, taken); in GenCompareAndBranch()
1445 RegLocation rl_src1, RegLocation rl_src2) { in GenLong3Addr() argument
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Dmir_to_lir.h795 bool HandleEasyFloatingPointDiv(RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2);
813 void GenCompareAndBranch(Instruction::Code opcode, RegLocation rl_src1, RegLocation rl_src2,
842 RegLocation rl_src1, RegLocation rl_src2);
844 RegLocation rl_src1, RegLocation rl_shift);
848 RegLocation rl_src1, RegLocation rl_src2, int flags);
857 RegLocation rl_src1, RegLocation rl_src2, int flags);
1143 virtual void GenMultiplyByConstantFloat(RegLocation rl_dest, RegLocation rl_src1,
1145 virtual void GenMultiplyByConstantDouble(RegLocation rl_dest, RegLocation rl_src1,
1278 RegLocation rl_src1, RegLocation rl_src2, int flags) = 0;
1280 RegLocation rl_dest, RegLocation rl_src1,
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