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Searched refs:Requires (Results 1 – 25 of 383) sorted by relevance

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/external/llvm/lib/Target/Hexagon/
DHexagonInstrFormatsV60.td46 OpcodeHexagon, Requires<[HasV60T, UseHVX]>;
52 OpcodeHexagon, Requires<[HasV60T, UseHVX]>;
58 OpcodeHexagon, Requires<[HasV60T, UseHVX]>;
64 Requires<[HasV60T, UseHVX]>;
70 OpcodeHexagon, Requires<[HasV60T, UseHVX]>;
76 OpcodeHexagon, Requires<[HasV60T, UseHVX]>;
82 OpcodeHexagon, Requires<[HasV60T, UseHVX]>;
88 OpcodeHexagon, Requires<[HasV60T, UseHVX]>;
94 OpcodeHexagon, Requires<[HasV60T, UseHVX]>;
100 OpcodeHexagon, Requires<[HasV60T, UseHVX]>;
[all …]
DHexagonIntrinsicsV60.td65 Requires<[UseHVXSgl]>;
69 Requires<[UseHVXSgl]>;
74 Requires<[UseHVXDbl]>;
79 Requires<[UseHVXDbl]>;
85 Requires<[UseHVXSgl]>;
90 Requires<[UseHVXSgl]>;
95 Requires<[UseHVXSgl]>;
100 Requires<[UseHVXSgl]>;
105 Requires<[UseHVXSgl]>;
110 Requires<[UseHVXSgl]>;
[all …]
DHexagonInstrInfoV5.td50 Requires<[HasV5T]> {
61 Requires<[HasV5T]> {
66 Requires<[HasV5T]> {
79 Requires<[HasV5T]>;
85 Requires<[HasV5T]>;
91 Requires<[HasV5T]>;
105 Requires<[HasV5T]>;
112 Requires<[HasV5T]>;
119 Requires<[HasV5T]>;
130 Requires<[HasV5T]> {
[all …]
DHexagonInstrAlias.td283 Requires<[UseMEMOP]>;
287 Requires<[UseMEMOP]>;
291 Requires<[UseMEMOP]>;
295 Requires<[UseMEMOP]>;
299 Requires<[UseMEMOP]>;
303 Requires<[UseMEMOP]>;
307 Requires<[UseMEMOP]>;
311 Requires<[UseMEMOP]>;
315 Requires<[UseMEMOP]>;
319 Requires<[UseMEMOP]>;
[all …]
/external/llvm/lib/Target/X86/
DX86InstrMPX.td19 Requires<[HasMPX, Not64BitMode]>;
22 Requires<[HasMPX, In64BitMode]>;
30 Requires<[HasMPX, Not64BitMode]>;
33 Requires<[HasMPX, In64BitMode]>;
36 Requires<[HasMPX, Not64BitMode]>;
39 Requires<[HasMPX, In64BitMode]>;
47 Requires<[HasMPX]>;
50 Requires<[HasMPX, Not64BitMode]>;
53 Requires<[HasMPX, In64BitMode]>;
57 Requires<[HasMPX]>;
[all …]
DX86InstrVMX.td21 Requires<[Not64BitMode]>;
24 Requires<[In64BitMode]>;
28 Requires<[Not64BitMode]>;
31 Requires<[In64BitMode]>;
47 "vmread{q}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[In64BitMode]>;
49 "vmread{q}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[In64BitMode]>;
51 "vmread{l}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[Not64BitMode]>;
53 "vmread{l}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[Not64BitMode]>;
55 "vmwrite{q}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[In64BitMode]>;
57 "vmwrite{q}\t{$src, $dst|$dst, $src}", []>, PS, Requires<[In64BitMode]>;
[all …]
DX86InstrTSX.td24 Requires<[HasRTM]>;
28 "xbegin\t$dst", []>, OpSize16, Requires<[HasRTM]>;
30 "xbegin\t$dst", []>, OpSize32, Requires<[HasRTM]>;
34 "xend", [(int_x86_xend)]>, TB, Requires<[HasRTM]>;
38 "xtest", [(set EFLAGS, (X86xtest))]>, TB, Requires<[HasTSX]>;
42 [(int_x86_xabort imm:$imm)]>, Requires<[HasRTM]>;
47 def XACQUIRE_PREFIX : I<0xF2, RawFrm, (outs), (ins), "xacquire", []>, Requires<[HasHLE]>;
48 def XRELEASE_PREFIX : I<0xF3, RawFrm, (outs), (ins), "xrelease", []>, Requires<[HasHLE]>;
DX86InstrSVM.td34 "vmrun\t{%eax|eax}", []>, TB, Requires<[Not64BitMode]>;
37 "vmrun\t{%rax|rax}", []>, TB, Requires<[In64BitMode]>;
42 "vmload\t{%eax|eax}", []>, TB, Requires<[Not64BitMode]>;
45 "vmload\t{%rax|rax}", []>, TB, Requires<[In64BitMode]>;
50 "vmsave\t{%eax|eax}", []>, TB, Requires<[Not64BitMode]>;
53 "vmsave\t{%rax|rax}", []>, TB, Requires<[In64BitMode]>;
58 "invlpga\t{%ecx, %eax|eax, ecx}", []>, TB, Requires<[Not64BitMode]>;
61 "invlpga\t{%ecx, %rax|rax, ecx}", []>, TB, Requires<[In64BitMode]>;
DX86InstrSystem.td54 Requires<[In64BitMode]>;
62 IIC_SYS_ENTER_EXIT>, TB, Requires<[In64BitMode]>;
66 (INT3)>, Requires<[NotPS4]>;
68 (INT (i8 0x41))>, Requires<[IsPS4]>;
122 Requires<[Not64BitMode]>;
125 Requires<[In64BitMode]>;
129 Requires<[Not64BitMode]>;
132 Requires<[In64BitMode]>;
141 Requires<[Not64BitMode]>;
144 Requires<[In64BitMode]>;
[all …]
DX86InstrControl.td26 Requires<[Not64BitMode]>;
29 Requires<[In64BitMode]>;
36 Requires<[Not64BitMode]>;
40 Requires<[In64BitMode]>;
47 "{l}ret{|f}q", [], IIC_RET>, Requires<[In64BitMode]>;
53 "{l}ret{|f}q\t$amt", [], IIC_RET>, Requires<[In64BitMode]>;
65 IIC_IRET>, Requires<[In64BitMode]>;
122 Requires<[Not64BitMode]>;
130 Requires<[In64BitMode]>;
136 [(brind GR16:$dst)], IIC_JMP_REG>, Requires<[Not64BitMode]>,
[all …]
DX86InstrFormats.td525 : I<o, F, outs, ins, asm, pattern, itin>, XS, Requires<[UseSSE1]>;
528 : Ii8<o, F, outs, ins, asm, pattern, itin>, XS, Requires<[UseSSE1]>;
532 Requires<[UseSSE1]>;
536 Requires<[UseSSE1]>;
540 Requires<[HasAVX]>;
544 Requires<[HasAVX]>;
566 : I<o, F, outs, ins, asm, pattern, itin>, XD, Requires<[UseSSE2]>;
569 : Ii8<o, F, outs, ins, asm, pattern, itin>, XD, Requires<[UseSSE2]>;
572 : I<o, F, outs, ins, asm, pattern, itin>, XS, Requires<[UseSSE2]>;
575 : Ii8<o, F, outs, ins, asm, pattern>, XS, Requires<[UseSSE2]>;
[all …]
DX86InstrCompiler.td49 Requires<[NotLP64]>;
53 Requires<[NotLP64]>;
56 (ADJCALLSTACKDOWN32 i32imm:$amt1, 0)>, Requires<[NotLP64]>;
68 Requires<[IsLP64]>;
72 Requires<[IsLP64]>;
75 (ADJCALLSTACKDOWN64 i32imm:$amt1, 0)>, Requires<[IsLP64]>;
125 Requires<[NotLP64]>;
132 Requires<[In64BitMode]>;
183 Requires<[Not64BitMode]>;
187 Requires<[In64BitMode]>;
[all …]
DX86InstrInfo.td1036 Requires<[Not64BitMode]>;
1041 Requires<[In64BitMode]>;
1053 IIC_POP_REG>, OpSize32, Requires<[Not64BitMode]>;
1059 IIC_POP_REG>, OpSize32, Requires<[Not64BitMode]>;
1061 IIC_POP_MEM>, OpSize32, Requires<[Not64BitMode]>;
1068 IIC_PUSH_REG>, OpSize32, Requires<[Not64BitMode]>;
1072 IIC_PUSH_REG>, OpSize32, Requires<[Not64BitMode]>;
1081 Requires<[Not64BitMode]>;
1084 Requires<[Not64BitMode]>;
1091 IIC_PUSH_MEM>, OpSize32, Requires<[Not64BitMode]>;
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/external/llvm/lib/Target/Sparc/
DSparcInstrAliases.td76 (BPICC brtarget:$imm, condVal)>, Requires<[HasV9]>;
80 (BPICC brtarget:$imm, condVal)>, Requires<[HasV9]>;
84 (BPICCA brtarget:$imm, condVal)>, Requires<[HasV9]>;
88 (BPICCA brtarget:$imm, condVal)>, Requires<[HasV9]>;
92 (BPICCNT brtarget:$imm, condVal)>, Requires<[HasV9]>;
96 (BPICCANT brtarget:$imm, condVal)>, Requires<[HasV9]>;
100 (BPXCC brtarget:$imm, condVal)>, Requires<[Is64Bit]>;
104 (BPXCC brtarget:$imm, condVal)>, Requires<[Is64Bit]>;
108 (BPXCCA brtarget:$imm, condVal)>, Requires<[Is64Bit]>;
112 (BPXCCA brtarget:$imm, condVal)>, Requires<[Is64Bit]>;
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/external/llvm/lib/Target/ARM/
DARMInstrVFP.td225 Requires<[HasVFP2]>;
227 Requires<[HasVFP2]>;
229 Requires<[HasVFP2]>;
231 Requires<[HasVFP2]>;
363 Requires<[HasFPARMv8]>;
369 Requires<[HasFPARMv8, HasDPVFP]>;
385 Requires<[HasFPARMv8]>;
391 Requires<[HasFPARMv8, HasDPVFP]>;
401 Requires<[NoHonorSignDependentRounding,HasDPVFP]>;
403 (VNMULS SPR:$a, SPR:$b)>, Requires<[NoHonorSignDependentRounding]>;
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DARMInstrThumb2.td833 Requires<[IsThumb2]>, Sched<[WriteALU, ReadALU]> {
843 Requires<[IsThumb2]>, Sched<[WriteALU, ReadALU, ReadALU]> {
857 Requires<[IsThumb2]>, Sched<[WriteALUsi, ReadALU]> {
1127 Requires<[IsThumb2]> {
1144 Requires<[HasT2ExtractPack, IsThumb2]> {
1160 Requires<[IsThumb2, HasT2ExtractPack]> {
1178 Requires<[HasT2ExtractPack, IsThumb2]> {
1191 Requires<[HasT2ExtractPack, IsThumb2]> {
1417 opc, asm, "", pattern>, Requires<[IsThumb, HasV8]> {
1589 asm, "", pattern>, Requires<[IsThumb, HasV8]> {
[all …]
DARMInstrInfo.td1514 Requires<[IsARM, HasV6]>, Sched<[WriteALUsi]> {
1527 Requires<[IsARM, HasV6]>, Sched<[WriteALUsi]> {
1540 Requires<[IsARM, HasV6]>, Sched<[WriteALUsr]> {
1555 Requires<[IsARM, HasV6]>, Sched<[WriteALUsr]> {
1570 Requires<[IsARM]>,
1583 Requires<[IsARM]>,
1599 Requires<[IsARM]>,
1616 Requires<[IsARM]>,
1640 Requires<[IsARM]>,
1666 Requires<[IsARM]>,
[all …]
/external/llvm/test/CodeGen/X86/
Dstack-protector.ll25 ; Requires no protector.
56 ; Requires protector.
92 ; Requires protector.
124 ; Requires protector.
156 ; Requires no protector.
189 ; Requires protector.
223 ; Requires protector.
257 ; Requires protector.
291 ; Requires no protector.
322 ; Requires no protector.
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/external/mesa3d/src/gallium/targets/xa-vmwgfx/
Dxatracker.pc.in8 Requires:
9 Requires.private: @XA_PC_REQ_PRIV@
/external/harfbuzz_ng/src/
Dharfbuzz-icu.pc.in10 Requires: harfbuzz
11 Requires.private: icu-uc
/external/libmicrohttpd/
Dlibmicrohttpd.pc.in9 Requires:
10 Requires.private: @MHD_REQ_PRIVATE@
/external/libvncserver/
Dlibvncclient.pc.in9 Requires:
10 Requires.private: zlib
Dlibvncserver.pc.in9 Requires:
10 Requires.private: zlib
/external/clang/test/SemaTemplate/
Doverload-candidates.cpp99 typename Requires = typename std::enable_if<a_trait<T>::value>::type>
116 typename Requires = typename a_pony<T>::type>
134 typename Requires = unicorns<T> >
/external/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.td204 def Select32Mux : SelectWrapper<GRX32>, Requires<[FeatureHighWord]>;
212 Requires<[FeatureHighWord]>;
215 Requires<[FeatureHighWord]>;
279 Requires<[FeatureHighWord]>;
304 Requires<[FeatureHighWord]>;
324 Requires<[FeatureHighWord]>;
327 Requires<[FeatureHighWord]>;
361 Requires<[FeatureHighWord]>;
364 Requires<[FeatureHighWord]>;
437 Requires<[FeatureHighWord]>;
[all …]

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