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Searched refs:STH (Results 1 – 16 of 16) sorted by relevance

/external/llvm/test/CodeGen/SystemZ/
Dint-move-05.ll34 ; Check the high end of the STH range.
44 ; Check the next halfword up, which should use STHY instead of STH.
108 ; Check that STH allows an index.
Dcond-store-02.ll188 ; Check the high end of the aligned STH range.
205 ; Check the next halfword up, which should use STHY instead of STH.
/external/v8/src/ppc/
Dconstants-ppc.h134 STH = 44 << 26, // Store Half enumerator
Ddisasm-ppc.cc1296 case STH: { in InstructionDecode()
Dassembler-ppc.cc1232 d_form(STH, dst, src.ra(), src.offset(), true); in sth()
Dsimulator-ppc.cc3641 case STH: { in ExecuteGeneric()
/external/llvm/lib/Target/BPF/
DBPFInstrInfo.td320 def STH : STOREi64<0x1, "sth", truncstorei16>;
/external/llvm/lib/Target/PowerPC/
DPPCFastISel.cpp622 Opc = Is32BitInt ? PPC::STH : PPC::STH8; in PPCEmitStore()
692 case PPC::STH : Opc = PPC::STHX; break; in PPCEmitStore()
DPPCRegisterInfo.cpp70 ImmToIdxMap[PPC::STH] = PPC::STHX; ImmToIdxMap[PPC::STW] = PPC::STWX; in PPCRegisterInfo()
DPPCISelDAGToDAG.cpp4239 case PPC::STH: in PeepholePPC64()
DPPCInstrInfo.td1726 def STH : DForm_1<44, (outs), (ins gprc:$rS, memri:$src),
4123 def : Pat<(atomic_store_16 iaddr:$ptr, i32:$val), (STH gprc:$val, memri:$ptr)>;
/external/llvm/lib/Target/SystemZ/
DSystemZInstrInfo.td529 // STH, STHY or STHH, depending on the choice of register.
532 defm STH : StoreRXPair<"sth", 0x40, 0xE370, truncstorei16, GR32, 2>;
539 defm : StoreGR64Pair<STH, STHY, truncstorei16>;
DSystemZInstrInfo.cpp948 expandRXYPseudo(MI, SystemZ::STH, SystemZ::STHH); in expandPostRAPseudo()
DSystemZISelLowering.cpp5696 return emitCondStore(MI, MBB, SystemZ::STH, 0, false); in EmitInstrWithCustomInserter()
5698 return emitCondStore(MI, MBB, SystemZ::STH, 0, true); in EmitInstrWithCustomInserter()
/external/llvm/lib/Target/Sparc/
DSparcInstrInfo.td467 defm STH : StoreA<"sth", 0b000110, 0b010110, truncstorei16, IntRegs, i32>;
/external/icu/icu4c/source/data/misc/
DsupplementalData.txt18297 "STH",