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Searched refs:UINT (Results 1 – 25 of 35) sorted by relevance

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/toolchain/binutils/binutils-2.25/opcodes/
Dmips16-opc.c64 case 'e': UINT (11, 0); in decode_mips16_operand()
78 case '<': UINT (5, 0); in decode_mips16_operand()
79 case '>': UINT (5, 0); in decode_mips16_operand()
80 case '[': UINT (6, 0); in decode_mips16_operand()
81 case ']': UINT (6, 0); in decode_mips16_operand()
95 case 'U': UINT (16, 0); in decode_mips16_operand()
113 case '5': UINT (5, 0); in decode_mips16_operand()
114 case '6': UINT (6, 5); in decode_mips16_operand()
115 case '8': UINT (8, 0); in decode_mips16_operand()
124 case 'U': UINT (8, 0); in decode_mips16_operand()
Dm32c-ibld.c585 FLD (f_2_2) = ((((UINT) (((FLD (f_imm3_S)) - (1))) >> (1))) & (3)); in m32c_cgen_insert_operand()
632 FLD (f_dsp_8_u8) = ((((UINT) (FLD (f_bitbase16_u11_S)) >> (3))) & (255)); in m32c_cgen_insert_operand()
667 …value = EXTHISI (((HI) (INT) (((((((UINT) (value) >> (8))) & (255))) | (((((value) << (8))) & (652… in m32c_cgen_insert_operand()
678 FLD (f_dsp_16_u8) = ((((UINT) (FLD (f_bitbase32_16_u11_unprefixed)) >> (3))) & (255)); in m32c_cgen_insert_operand()
692 FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u19_unprefixed)) >> (3))) & (65535)); in m32c_cgen_insert_operand()
710 FLD (f_dsp_16_u16) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (3))) & (65535)); in m32c_cgen_insert_operand()
711 FLD (f_dsp_32_u8) = ((((UINT) (FLD (f_bitbase32_16_u27_unprefixed)) >> (19))) & (255)); in m32c_cgen_insert_operand()
746 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_s19_prefixed)) >> (3))) & (255)); in m32c_cgen_insert_operand()
764 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u11_prefixed)) >> (3))) & (255)); in m32c_cgen_insert_operand()
778 FLD (f_dsp_24_u8) = ((((UINT) (FLD (f_bitbase32_24_u19_prefixed)) >> (3))) & (255)); in m32c_cgen_insert_operand()
[all …]
Depiphany-ibld.c574 FLD (f_disp8) = ((((UINT) (FLD (f_disp11)) >> (3))) & (255)); in epiphany_cgen_insert_operand()
598 FLD (f_rd_x) = ((UINT) (FLD (f_rd6)) >> (3)); in epiphany_cgen_insert_operand()
615 FLD (f_rm_x) = ((UINT) (FLD (f_rm6)) >> (3)); in epiphany_cgen_insert_operand()
632 FLD (f_rn_x) = ((UINT) (FLD (f_rn6)) >> (3)); in epiphany_cgen_insert_operand()
646 FLD (f_imm_27_8) = ((UINT) (FLD (f_imm16)) >> (8)); in epiphany_cgen_insert_operand()
666 FLD (f_rd_x) = ((UINT) (FLD (f_rd6)) >> (3)); in epiphany_cgen_insert_operand()
683 FLD (f_rm_x) = ((UINT) (FLD (f_rm6)) >> (3)); in epiphany_cgen_insert_operand()
700 FLD (f_rn_x) = ((UINT) (FLD (f_rn6)) >> (3)); in epiphany_cgen_insert_operand()
717 FLD (f_sd_x) = ((UINT) (FLD (f_sd6)) >> (3)); in epiphany_cgen_insert_operand()
731 FLD (f_sd_x) = ((UINT) (FLD (f_sd6)) >> (3)); in epiphany_cgen_insert_operand()
[all …]
Dmep-ibld.c571 FLD (f_24u8a4n_hi) = ((UINT) (FLD (f_24u8a4n)) >> (8)); in mep_cgen_insert_operand()
572 FLD (f_24u8a4n_lo) = ((UINT) (((FLD (f_24u8a4n)) & (252))) >> (2)); in mep_cgen_insert_operand()
585 FLD (f_c5_rm) = ((UINT) (FLD (f_c5_rmuimm20)) >> (16)); in mep_cgen_insert_operand()
599 FLD (f_c5_rnm) = ((UINT) (FLD (f_c5_rnmuimm24)) >> (16)); in mep_cgen_insert_operand()
613 FLD (f_5) = ((((UINT) (FLD (f_callnum)) >> (3))) & (1)); in mep_cgen_insert_operand()
614 FLD (f_6) = ((((UINT) (FLD (f_callnum)) >> (2))) & (1)); in mep_cgen_insert_operand()
615 FLD (f_7) = ((((UINT) (FLD (f_callnum)) >> (1))) & (1)); in mep_cgen_insert_operand()
638 FLD (f_ccrn_hi) = ((((UINT) (FLD (f_ccrn)) >> (4))) & (3)); in mep_cgen_insert_operand()
692 FLD (f_24u4n_hi) = ((UINT) (FLD (f_24u4n)) >> (16)); in mep_cgen_insert_operand()
715 FLD (f_crnx_hi) = ((UINT) (FLD (f_crnx)) >> (4)); in mep_cgen_insert_operand()
[all …]
Dor1k-ibld.c625 FLD (f_imm16_25_5) = ((((UINT) (FLD (f_uimm16_split)) >> (11))) & (31)); in or1k_cgen_insert_operand()
726 FLD (f_simm16_split) = ((HI) (UINT) (((((FLD (f_imm16_25_5)) << (11))) | (FLD (f_imm16_10_11))))); in or1k_cgen_extract_operand()
738 …FLD (f_uimm16_split) = ((UHI) (UINT) (((((FLD (f_imm16_25_5)) << (11))) | (FLD (f_imm16_10_11))))); in or1k_cgen_extract_operand()
Dmips-formats.h29 #define UINT(SIZE, LSB) \ macro
Dmips-opc.c97 case 'f': UINT (4, 22); in decode_mips_operand()
106 case 'U': UINT (8, 10); in decode_mips_operand()
111 case 'T': UINT (5, 16); in decode_mips_operand()
136 case 'I': UINT (2, 6); in decode_mips_operand()
142 case 'O': UINT (3, 6); in decode_mips_operand()
185 case '$': UINT (5, 16); /* (0 .. 31) */ in decode_mips_operand()
200 case '%': UINT (3, 21); in decode_mips_operand()
204 case '!': UINT (1, 5); in decode_mips_operand()
205 case '$': UINT (1, 4); in decode_mips_operand()
227 case 'H': UINT (3, 0); in decode_mips_operand()
[all …]
Dfrv-ibld.c766 FLD (f_labelL18) = ((((UINT) (((FLD (f_label24)) - (pc))) >> (2))) & (262143)); in frv_cgen_insert_operand()
812 FLD (f_spr_h) = ((UINT) (FLD (f_spr)) >> (6)); in frv_cgen_insert_operand()
Dxstormy16-ibld.c590 FLD (f_abs24_2) = ((UINT) (FLD (f_abs24)) >> (8)); in xstormy16_cgen_insert_operand()
Dmicromips-opc.c96 case 'Z': UINT (0, 0); /* 0 only */ in decode_micromips_operand()
134 case '$': UINT (5, 16); /* (0 .. 31) */ in decode_micromips_operand()
167 case 'H': UINT (3, 11); in decode_micromips_operand()
/toolchain/binutils/binutils-2.25/cpu/
Dmep-sample-ucidsp.cpu45 (df f-uci_elfext_1-lo "uci_elfext_1 simm16 lo 20s31" (mep-ext1-isa) 20 12 UINT #f #f)
62 (df f-uci_elfext_2-hi "uci_elfext_2 uimm16 hi 4u7" (mep-ext1-isa) 4 4 UINT #f #f)
63 (df f-uci_elfext_2-lo "uci_elfext_2 uimm16 lo 20u31" (mep-ext1-isa) 20 12 UINT #f #f)
68 (mode UINT)
80 (df f-uci_elfext-sub "sub-opcode for uci_elfext instructions" (mep-ext1-isa) 16 4 UINT #f #f)
Dmep-core.cpu358 (df f-csrn-hi "cr hi 1u15" (all-mep-core-isas) 15 1 UINT #f #f)
359 (df f-csrn-lo "cr lo 4u8" (all-mep-core-isas) 8 4 UINT #f #f)
364 (mode UINT)
373 (df f-crnx-hi "crx hi 1u28" (all-mep-core-isas) 28 1 UINT #f #f)
374 (df f-crnx-lo "crx lo 4u4" (all-mep-core-isas) 4 4 UINT #f #f)
379 (mode UINT)
444 (df f-24s5a2n-lo "24s5a2n lo 7s5a2" (all-mep-core-isas PCREL-ADDR) 5 7 UINT #f #f)
464 (df f-24u5a2n-hi "24u5a2n hi 16u16" (all-mep-core-isas) 16 16 UINT #f #f)
465 (df f-24u5a2n-lo "24u5a2n lo 7u5a2" (all-mep-core-isas) 5 7 UINT #f #f)
470 (mode UINT)
[all …]
Dsimplify.inc48 (define-full-ifield name comment attrs start length UINT #f #f)
77 ; Simple multi-ifields: mode is UINT, default insert/extract support,
82 (define-full-multi-ifield name comment attrs UINT subflds #f #f)
Dmep-c5.cpu234 (df f-c5-16u16 "general 16-bit u-val" (all-mep-isas) 16 16 UINT #f #f)
236 (dnmf f-c5-rmuimm20 "20-bit immediate in Rm/Imm16" (all-mep-isas) UINT
249 (dnmf f-c5-rnmuimm24 "24-bit immediate in Rm/Imm16" (all-mep-isas) UINT
Dsh64-compact.cpu215 (df f-imm4x2 "Immediate (4 bits)" ((ISA compact)) 3 4 UINT
219 (df f-imm4x4 "Immediate (4 bits)" ((ISA compact)) 3 4 UINT
223 (df f-imm8x2 "Immediate (8 bits)" ((ISA compact)) 7 8 UINT
227 (df f-imm8x4 "Immediate (8 bits)" ((ISA compact)) 7 8 UINT
231 (df f-dn "Double selector n" ((ISA compact)) 11 3 UINT
235 (df f-dm "Double selector m" ((ISA compact)) 7 3 UINT
239 (df f-vn "Vector selector n" ((ISA compact)) 11 2 UINT
243 (df f-vm "Vector selector m" ((ISA compact)) 9 2 UINT
247 (df f-xn "Extended selector n" ((ISA compact)) 11 3 UINT
251 (df f-xm "Extended selector m" ((ISA compact)) 7 3 UINT
Dmep-fmax.cpu55 (mode UINT)
67 (mode UINT)
79 (mode UINT)
Dm32c.cpu242 (df f-src32-rn-unprefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 10 2 UINT
254 (df f-src32-rn-prefixed-QI "source Rn QI for m32c" (MACH32 m32c-isa) 18 2 UINT
266 (df f-src32-rn-unprefixed-HI "source Rn HI for m32c" (MACH32 m32c-isa) 10 2 UINT
279 (df f-src32-rn-prefixed-HI "source Rn HI for m32c" (MACH32 m32c-isa) 18 2 UINT
289 (df f-src32-rn-unprefixed-SI "source Rn SI for m32c" (MACH32 m32c-isa) 10 2 UINT
293 (df f-src32-rn-prefixed-SI "source Rn SI for m32c" (MACH32 m32c-isa) 18 2 UINT
318 (df f-dst32-rn-unprefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 8 2 UINT
322 (df f-dst32-rn-prefixed-QI "destination Rn QI for m32c" (MACH32 m32c-isa) 16 2 UINT
334 (df f-dst32-rn-unprefixed-HI "destination Rn HI for m32c" (MACH32 m32c-isa) 8 2 UINT
338 (df f-dst32-rn-prefixed-HI "destination Rn HI for m32c" (MACH32 m32c-isa) 16 2 UINT
[all …]
Dfr30.cpu73 (load-regs UINT)
75 (load-regs-pending UINT)
161 (df f-m4 "4 bit minus extended" () 8 4 UINT
173 (dnmf f-i20 "20 bit unsigned" () UINT
187 (df f-udisp6 "6 bit unsigned offset" () 8 4 UINT
204 (df f-u10 "10 bit unsigned offset" () 8 8 UINT
213 (df f-dir9 "9 bit direct address" () 8 8 UINT
217 (df f-dir10 "10 bit direct address" () 8 8 UINT
Diq2000.cpu158 (mode UINT)
173 (mode UINT)
188 (mode UINT)
199 (df f-jtarg "jump target field" (ABS-ADDR) 15 16 UINT
203 (df f-jtargq10 "iq10 jump target field" (ABS-ADDR) 20 21 UINT
Dcris.cpu217 (prev-prev-prev-modf-regs UINT)
220 (prev-prev-modf-regs UINT)
223 (prev-modf-regs UINT)
227 (modf-regs UINT)
235 (prev-prev-prev-movem-dest-regs UINT)
238 (prev-prev-movem-dest-regs UINT)
241 (prev-movem-dest-regs UINT)
245 (movem-dest-regs UINT))
709 (type immediate (UINT 1))
716 (type immediate (UINT 4))
[all …]
Dor1korbis.cpu24 (dnh h-uimm16 "16-bit unsigned immediate" () (immediate (UINT 16)) () () ())
25 (dnh h-uimm6 "6-bit unsigned immediate" () (immediate (UINT 6)) () () ())
90 (mode UINT)
Dxstormy16.cpu180 (type immediate (UINT 4))
191 (type immediate (UINT 1))
339 (mode UINT)
406 (mode UINT)
/toolchain/binutils/binutils-2.25/include/cgen/
Dbasic-modes.h47 typedef unsigned int UINT; typedef
/toolchain/binutils/binutils-2.25/include/opcode/
Dm88k.h69 typedef unsigned int UINT; typedef
/toolchain/binutils/binutils-2.25/binutils/
Dwinduni.c531 return !! IsValidCodePage ((UINT) cp); in unicode_is_valid_codepage()

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