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Searched refs:Vd (Results 1 – 25 of 32) sorted by relevance

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/external/llvm/lib/Target/ARM/
DARMInstrNEON.td275 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
285 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
295 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
306 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
316 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
326 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
336 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
346 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
358 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
368 let MIOperandInfo = (ops DPR:$Vd, i32imm:$idx);
[all …]
DARMInstrFormats.td1939 bits<5> Vd;
1943 let Inst{22} = Vd{4};
1944 let Inst{15-12} = Vd{3-0};
2009 bits<5> Vd;
2012 let Inst{15-12} = Vd{3-0};
2013 let Inst{22} = Vd{4};
2035 bits<5> Vd;
2038 let Inst{15-12} = Vd{3-0};
2039 let Inst{22} = Vd{4};
2049 OpcodeStr, Dt, "$Vd, $Vm", "", pattern> {
[all …]
DARMInstrVFP.td1233 // if dp_operation then UInt(D:Vd) else UInt(Vd:D);
1245 // if dp_operation then UInt(D:Vd) else UInt(Vd:D);
/external/v8/src/arm/
Ddisasm-arm.cc89 void FormatNeonList(int Vd, int type);
398 void Decoder::FormatNeonList(int Vd, int type) { in FormatNeonList() argument
401 "{d%d}", Vd); in FormatNeonList()
404 "{d%d, d%d}", Vd, Vd + 1); in FormatNeonList()
407 "{d%d, d%d, d%d}", Vd, Vd + 1, Vd + 2); in FormatNeonList()
410 "{d%d, d%d, d%d, d%d}", Vd, Vd + 1, Vd + 2, Vd + 3); in FormatNeonList()
1699 int Vd = (instr->Bit(22) << 3) | (instr->VdValue() >> 1); in DecodeSpecialCondition() local
1703 "vmovl.s%d q%d, d%d", imm3*8, Vd, Vm); in DecodeSpecialCondition()
1713 int Vd = (instr->Bit(22) << 3) | (instr->VdValue() >> 1); in DecodeSpecialCondition() local
1717 "vmovl.u%d q%d, d%d", imm3*8, Vd, Vm); in DecodeSpecialCondition()
[all …]
Dsimulator-arm.cc3740 int Vd = (instr->Bit(22) << 3) | (instr->VdValue() >> 1); in DecodeSpecialCondition() local
3754 set_q_register(Vd, reinterpret_cast<uint64_t*>(to)); in DecodeSpecialCondition()
3764 int Vd = (instr->Bit(22) << 3) | (instr->VdValue() >> 1); in DecodeSpecialCondition() local
3778 set_q_register(Vd, reinterpret_cast<uint64_t*>(to)); in DecodeSpecialCondition()
3786 int Vd = (instr->Bit(22) << 4) | instr->VdValue(); in DecodeSpecialCondition() local
3812 get_d_register(Vd + r, data); in DecodeSpecialCondition()
3827 int Vd = (instr->Bit(22) << 4) | instr->VdValue(); in DecodeSpecialCondition() local
3855 set_d_register(Vd + r, data); in DecodeSpecialCondition()
Dassembler-arm.cc2864 int D, Vd, M, Vm; in EncodeVCVT() local
2866 SplitRegCode(dst_type, dst_code, &Vd, &D); in EncodeVCVT()
2889 Vd*B12 | 0x5*B9 | sz*B8 | op*B7 | B6 | M*B5 | Vm); in EncodeVCVT()
2897 Vd*B12 | 0x5*B9 | sz*B8 | B7 | B6 | M*B5 | Vm); in EncodeVCVT()
/external/clang/include/clang/Analysis/Analyses/
DThreadSafetyTIL.h364 Variable(const Variable &Vd, SExpr *D) // rewrite constructor in Variable() argument
365 : SExpr(Vd), Name(Vd.Name), Definition(D), Cvdecl(Vd.Cvdecl) { in Variable()
366 Flags = Vd.kind(); in Variable()
659 Function(Variable *Vd, SExpr *Bd) in Function() argument
660 : SExpr(COP_Function), VarDecl(Vd), Body(Bd) { in Function()
661 Vd->setKind(Variable::VK_Fun); in Function()
663 Function(const Function &F, Variable *Vd, SExpr *Bd) // rewrite constructor in Function() argument
664 : SExpr(F), VarDecl(Vd), Body(Bd) { in Function()
665 Vd->setKind(Variable::VK_Fun); in Function()
710 SFunction(Variable *Vd, SExpr *B) in SFunction() argument
[all …]
/external/clang/lib/Analysis/
DThreadSafety.cpp243 bool containsMutexDecl(FactManager &FM, const ValueDecl* Vd) const { in containsMutexDecl()
245 return FM[ID].valueDecl() == Vd; in containsMutexDecl()
275 BeforeInfo* insertAttrExprs(const ValueDecl* Vd,
278 BeforeInfo *getBeforeInfoForDecl(const ValueDecl *Vd,
281 void checkBeforeAfter(const ValueDecl* Vd,
967 BeforeSet::BeforeInfo* BeforeSet::insertAttrExprs(const ValueDecl* Vd, in insertAttrExprs() argument
974 std::unique_ptr<BeforeInfo> &InfoPtr = BMap[Vd]; in insertAttrExprs()
980 for (Attr* At : Vd->attrs()) { in insertAttrExprs()
1008 ArgInfo->Vect.push_back(Vd); in insertAttrExprs()
1022 BeforeSet::getBeforeInfoForDecl(const ValueDecl *Vd, in getBeforeInfoForDecl() argument
[all …]
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td2766 def : InstAlias<"mvn{ $Vd.8b, $Vn.8b|.8b $Vd, $Vn}",
2767 (NOTv8i8 V64:$Vd, V64:$Vn)>;
2768 def : InstAlias<"mvn{ $Vd.16b, $Vn.16b|.16b $Vd, $Vn}",
2769 (NOTv16i8 V128:$Vd, V128:$Vn)>;
3909 (v16i8 V128:$Vd), VectorIndexB:$idx, (v16i8 V128:$Vs),
3912 V128:$Vd, VectorIndexB:$idx, V128:$Vs, VectorIndexB:$idx2)
3915 (v8i16 V128:$Vd), VectorIndexH:$idx, (v8i16 V128:$Vs),
3918 V128:$Vd, VectorIndexH:$idx, V128:$Vs, VectorIndexH:$idx2)
3921 (v4i32 V128:$Vd), VectorIndexS:$idx, (v4i32 V128:$Vs),
3924 V128:$Vd, VectorIndexS:$idx, V128:$Vs, VectorIndexS:$idx2)
[all …]
DAArch64SchedCyclone.td320 // FMOVv2f64ns Vd.2d, #0.0
329 // ORR.16b Vd,Vn,Vn
630 // Vd is read 5 cycles after issuing the vector load.
DAArch64InstrFormats.td5072 def : InstAlias<asm # "\t$Vd.4h, $Vn.4h, #0",
5073 (!cast<Instruction>(NAME # v4i16rz) V64:$Vd, V64:$Vn), 0>;
5074 def : InstAlias<asm # "\t$Vd.8h, $Vn.8h, #0",
5075 (!cast<Instruction>(NAME # v8i16rz) V128:$Vd, V128:$Vn), 0>;
5077 def : InstAlias<asm # "\t$Vd.2s, $Vn.2s, #0",
5078 (!cast<Instruction>(NAME # v2i32rz) V64:$Vd, V64:$Vn), 0>;
5079 def : InstAlias<asm # "\t$Vd.4s, $Vn.4s, #0",
5080 (!cast<Instruction>(NAME # v4i32rz) V128:$Vd, V128:$Vn), 0>;
5081 def : InstAlias<asm # "\t$Vd.2d, $Vn.2d, #0",
5082 (!cast<Instruction>(NAME # v2i64rz) V128:$Vd, V128:$Vn), 0>;
[all …]
/external/v8/benchmarks/
Draytrace.js481 var Vd = this.position.dot(ray.direction);
482 if(Vd == 0) return info; // no intersection
484 var t = -(this.position.dot(ray.position) + this.d) / Vd;
/external/llvm/lib/Target/ARM/Disassembler/
DARMDisassembler.cpp1239 unsigned Vd = fieldFromInstruction(Val, 8, 5); in DecodeSPRRegListOperand() local
1243 if (regs == 0 || (Vd + regs) > 32) { in DecodeSPRRegListOperand()
1244 regs = Vd + regs > 32 ? 32 - Vd : regs; in DecodeSPRRegListOperand()
1249 if (!Check(S, DecodeSPRRegisterClass(Inst, Vd, Address, Decoder))) in DecodeSPRRegListOperand()
1252 if (!Check(S, DecodeSPRRegisterClass(Inst, ++Vd, Address, Decoder))) in DecodeSPRRegListOperand()
1263 unsigned Vd = fieldFromInstruction(Val, 8, 5); in DecodeDPRRegListOperand() local
1267 if (regs == 0 || regs > 16 || (Vd + regs) > 32) { in DecodeDPRRegListOperand()
1268 regs = Vd + regs > 32 ? 32 - Vd : regs; in DecodeDPRRegListOperand()
1274 if (!Check(S, DecodeDPRRegisterClass(Inst, Vd, Address, Decoder))) in DecodeDPRRegListOperand()
1277 if (!Check(S, DecodeDPRRegisterClass(Inst, ++Vd, Address, Decoder))) in DecodeDPRRegListOperand()
[all …]
/external/valgrind/
DREADME.aarch64177 MOVs to vector registers instead of INS Vd.D[0], Xreg, to avoid false
179 the semantics of INS Vd.D[0] to see if it zeroes out the top.)
/external/opencv3/modules/python/test/
Dcamera_calibration.py125 Vd = self.Pn.dot(r.d)
127 h = V0 / Vd
/external/doclava/res/assets/templates/assets/
Dprettify.js19 …rn d.join(P)}}var Vd=new RegExp(kc,R),Wd=/^<\!--/,Xd=/^<\[CDATA\[/,Yd=/^<br\b/i,Qa=/^<(\/?)([a-zA-…
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/en-GB/
Den-GB_kh0_kdt_dur.pkb131 …�c�AWްgf��t��]a�m�sRMU�����N�jJ�h"���x_U1�"�} q!u�+ tjk�Q�D�+Vd�Й$�.$�0��1K�ฅļ�0�…
Den-GB_kh0_kpdf_mgc.pkb214 …w������:�,�g�m�'�-*��:+,8xPr9n{�e��\mdgiiAK^"@1;>=H?C::MG\[Vd�P\(,G%/)--45/581…
1897 +!/EFJC46DLP\gd~t��Vd !4+<362/@7J@HPTVmn�4��o�
/external/libxml2/macos/
Dlibxml2.mcp.xml.sit.hqx51 q-!22J4GALA2Gf-r8NJpMV10V9AVG"3Ji(mbAf!4hB*[U"Z!k`i#JHp(Vd+!)[6i
260 eDqB!k2qVPc-b%D$PPCBkjU&2G*-#Z6L#E6qKI`l5ZCr&"6Vd+FBiNNFdLi&h5G+
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/fr-FR/
Dfr-FR_nk0_kpdf_mgc.pkb90 1��� 0)%5-,8@J=9Vd D:9=#$! .QM9C<9#2HSJY[m�LQ! .#"'%5,IU]Z,-4<qY���D6L�����…
2770 …��=���u;�� �� !f��ͭ�m�^J"hEA'+JQDgF=5C^+ED.1\��t�����ף���[^{�r����Vd������������������erg…
/external/valgrind/VEX/priv/
Dhost_arm_defs.c4517 UInt Vd = regD & 0xF; in emit_ARMInstr() local
4523 amt & 0xF, Vd, X0101, BITS4(L,Q,M,1), Vm); in emit_ARMInstr()
/external/webrtc/data/voice_engine/stereo_rtp_files/
Dstereo_g729.rtp371 …�A~�x�^x�30�K�Vx��`������<�4��Qh�����I��Xy��:�~�������2����xz�)��d;Vd_N�p��<�4��Q|�…
/external/llvm/tools/llvm-objdump/
DMachODump.cpp8580 MachO::version_min_command Vd = Obj->getVersionMinLoadCommand(Command); in PrintLoadCommands() local
8581 PrintVersionMinLoadCommand(Vd); in PrintLoadCommands()
/external/svox/pico_resources/tools/LingwareBuilding/PicoLingware_source_files/pkb/de-DE/
Dde-DE_gl0_kpdf_mgc.pkb2991 ;&]R_bUj�{��Vd��Kaxq���
/external/libjpeg-turbo/testimages/
Dtestorig.ppm4 …18A.>K1Pb<bxIk�Lu�Qt�Ps�Ms�Pq�Rp�Rr�Sr�Sr�Sp�Om�Mm�Kp�Ls�Ot�Qv�Uz�Y{�^z�_q�Vd�JZ�D]�JW~GRyBe\Me\Me…

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