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Searched refs:DPAQX_SA_W_PH (Results 1 – 18 of 18) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsISelLowering.h138 DPAQX_SA_W_PH, enumerator
DMipsDSPInstrInfo.td67 def MipsDPAQX_SA_W_PH : MipsDSPSideEffectBase<"DPAQX_SA_W_PH", SDT_MipsDPA>;
1256 def DPAQX_SA_W_PH : DspMMRel, DPAQX_SA_W_PH_ENC, DPAQX_SA_W_PH_DESC, ISA_DSPR2;
DMipsSEISelLowering.cpp2230 return lowerDSPIntr(Op, DAG, MipsISD::DPAQX_SA_W_PH); in lowerINTRINSIC_W_CHAIN()
DMipsISelLowering.cpp179 case MipsISD::DPAQX_SA_W_PH: return "MipsISD::DPAQX_SA_W_PH"; in getTargetNodeName()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsISelLowering.h190 DPAQX_SA_W_PH, enumerator
DMipsDSPInstrInfo.td68 def MipsDPAQX_SA_W_PH : MipsDSPSideEffectBase<"DPAQX_SA_W_PH", SDT_MipsDPA>;
1261 def DPAQX_SA_W_PH : DspMMRel, DPAQX_SA_W_PH_ENC, DPAQX_SA_W_PH_DESC, ISA_DSPR2;
DMipsScheduleGeneric.td655 def : InstRW<[GenericDSPShort], (instregex "^DPAQX_SA_W_PH$")>;
DMipsSEISelLowering.cpp2315 return lowerDSPIntr(Op, DAG, MipsISD::DPAQX_SA_W_PH); in lowerINTRINSIC_W_CHAIN()
DMipsISelLowering.cpp261 case MipsISD::DPAQX_SA_W_PH: return "MipsISD::DPAQX_SA_W_PH"; in getTargetNodeName()
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenSubtargetInfo.inc1094 {DBGFIELD("DPAQX_SA_W_PH") 1, false, false, 35, 1, 2, 1, 0, 0}, // #819
2114 {DBGFIELD("DPAQX_SA_W_PH") 0, false, false, 0, 0, 0, 0, 0, 0}, // #819
DMipsGenMCCodeEmitter.inc1247 UINT64_C(2080376496), // DPAQX_SA_W_PH
2709 case Mips::DPAQX_SA_W_PH:
8973 Feature_HasDSPR2 | 0, // DPAQX_SA_W_PH = 1234
DMipsGenInstrInfo.inc1249 DPAQX_SA_W_PH = 1234,
3476 DPAQX_SA_W_PH = 819,
5294 …ts), 0x6ULL, nullptr, ImplicitList13, OperandInfo222, -1 ,nullptr }, // Inst #1234 = DPAQX_SA_W_PH
9745 { Mips::DPAQX_SA_W_PH, Mips::DPAQX_SA_W_PH, Mips::DPAQX_SA_W_PH_MMR2 },
DMipsGenAsmWriter.inc2462 268457615U, // DPAQX_SA_W_PH
5093 0U, // DPAQX_SA_W_PH
DMipsGenDisassemblerTables.inc6005 /* 16261 */ MCD::OPC_Decode, 210, 9, 229, 1, // Opcode: DPAQX_SA_W_PH
DMipsGenDAGISel.inc26715 /* 50208*/ /*SwitchOpcode*/ 32, TARGET_VAL(MipsISD::DPAQX_SA_W_PH),// ->50243
26723 /* 50220*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::DPAQX_SA_W_PH), 0|OPFL_Chain,
26726 …// Dst: (DPAQX_SA_W_PH:{ *:[Untyped] } GPR32Opnd:{ *:[i32] }:$rs, GPR32Opnd:{ *:[i32] }:$rt, ACC64…
DMipsGenAsmMatcher.inc6049 …{ 3584 /* dpaqx_sa.w.ph */, Mips::DPAQX_SA_W_PH, Convert__ACC64DSPAsmReg1_0__GPR32AsmReg1_1__GPR32…
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc604 33575993U, // DPAQX_SA_W_PH
2318 0U, // DPAQX_SA_W_PH
DMipsGenDisassemblerTables.inc3473 /* 12633 */ MCD_OPC_Decode, 203, 4, 93, // Opcode: DPAQX_SA_W_PH