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Searched refs:DPAQX_S_W_PH (Results 1 – 18 of 18) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsISelLowering.h137 DPAQX_S_W_PH, enumerator
DMipsDSPInstrInfo.td66 def MipsDPAQX_S_W_PH : MipsDSPSideEffectBase<"DPAQX_S_W_PH", SDT_MipsDPA>;
1255 def DPAQX_S_W_PH : DspMMRel, DPAQX_S_W_PH_ENC, DPAQX_S_W_PH_DESC, ISA_DSPR2;
DMipsSEISelLowering.cpp2228 return lowerDSPIntr(Op, DAG, MipsISD::DPAQX_S_W_PH); in lowerINTRINSIC_W_CHAIN()
DMipsISelLowering.cpp178 case MipsISD::DPAQX_S_W_PH: return "MipsISD::DPAQX_S_W_PH"; in getTargetNodeName()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsISelLowering.h189 DPAQX_S_W_PH, enumerator
DMipsDSPInstrInfo.td67 def MipsDPAQX_S_W_PH : MipsDSPSideEffectBase<"DPAQX_S_W_PH", SDT_MipsDPA>;
1260 def DPAQX_S_W_PH : DspMMRel, DPAQX_S_W_PH_ENC, DPAQX_S_W_PH_DESC, ISA_DSPR2;
DMipsScheduleGeneric.td656 def : InstRW<[GenericDSPShort], (instregex "^DPAQX_S_W_PH$")>;
DMipsSEISelLowering.cpp2313 return lowerDSPIntr(Op, DAG, MipsISD::DPAQX_S_W_PH); in lowerINTRINSIC_W_CHAIN()
DMipsISelLowering.cpp260 case MipsISD::DPAQX_S_W_PH: return "MipsISD::DPAQX_S_W_PH"; in getTargetNodeName()
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenSubtargetInfo.inc1095 {DBGFIELD("DPAQX_S_W_PH") 1, false, false, 35, 1, 2, 1, 0, 0}, // #820
2115 {DBGFIELD("DPAQX_S_W_PH") 0, false, false, 0, 0, 0, 0, 0, 0}, // #820
DMipsGenMCCodeEmitter.inc1249 UINT64_C(2080376368), // DPAQX_S_W_PH
2710 case Mips::DPAQX_S_W_PH:
8975 Feature_HasDSPR2 | 0, // DPAQX_S_W_PH = 1236
DMipsGenInstrInfo.inc1251 DPAQX_S_W_PH = 1236,
3477 DPAQX_S_W_PH = 820,
5296 …cts), 0x6ULL, nullptr, ImplicitList13, OperandInfo222, -1 ,nullptr }, // Inst #1236 = DPAQX_S_W_PH
9746 { Mips::DPAQX_S_W_PH, Mips::DPAQX_S_W_PH, Mips::DPAQX_S_W_PH_MMR2 },
DMipsGenAsmWriter.inc2464 268457698U, // DPAQX_S_W_PH
5095 0U, // DPAQX_S_W_PH
DMipsGenDisassemblerTables.inc5997 /* 16217 */ MCD::OPC_Decode, 212, 9, 229, 1, // Opcode: DPAQX_S_W_PH
DMipsGenDAGISel.inc26695 /* 50173*/ /*SwitchOpcode*/ 32, TARGET_VAL(MipsISD::DPAQX_S_W_PH),// ->50208
26703 /* 50185*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::DPAQX_S_W_PH), 0|OPFL_Chain,
26706 …// Dst: (DPAQX_S_W_PH:{ *:[Untyped] } GPR32Opnd:{ *:[i32] }:$rs, GPR32Opnd:{ *:[i32] }:$rt, ACC64D…
DMipsGenAsmMatcher.inc6047 …{ 3571 /* dpaqx_s.w.ph */, Mips::DPAQX_S_W_PH, Convert__ACC64DSPAsmReg1_0__GPR32AsmReg1_1__GPR32As…
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc605 33576076U, // DPAQX_S_W_PH
2319 0U, // DPAQX_S_W_PH
DMipsGenDisassemblerTables.inc3465 /* 12597 */ MCD_OPC_Decode, 204, 4, 93, // Opcode: DPAQX_S_W_PH