Searched refs:DPAX_W_PH (Results 1 – 18 of 18) sorted by relevance
/external/llvm/lib/Target/Mips/ |
D | MipsISelLowering.h | 139 DPAX_W_PH, enumerator
|
D | MipsDSPInstrInfo.td | 68 def MipsDPAX_W_PH : MipsDSPBase<"DPAX_W_PH", SDT_MipsDPA>; 1257 def DPAX_W_PH : DspMMRel, DPAX_W_PH_ENC, DPAX_W_PH_DESC, ISA_DSPR2;
|
D | MipsSEISelLowering.cpp | 1539 return lowerDSPIntr(Op, DAG, MipsISD::DPAX_W_PH); in lowerINTRINSIC_WO_CHAIN()
|
D | MipsISelLowering.cpp | 180 case MipsISD::DPAX_W_PH: return "MipsISD::DPAX_W_PH"; in getTargetNodeName()
|
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
D | MipsISelLowering.h | 191 DPAX_W_PH, enumerator
|
D | MipsDSPInstrInfo.td | 69 def MipsDPAX_W_PH : MipsDSPBase<"DPAX_W_PH", SDT_MipsDPA>; 1262 def DPAX_W_PH : DspMMRel, DPAX_W_PH_ENC, DPAX_W_PH_DESC, ISA_DSPR2;
|
D | MipsScheduleGeneric.td | 657 def : InstRW<[GenericDSPShort], (instregex "^DPAX_W_PH$")>;
|
D | MipsSEISelLowering.cpp | 1523 return lowerDSPIntr(Op, DAG, MipsISD::DPAX_W_PH); in lowerINTRINSIC_WO_CHAIN()
|
D | MipsISelLowering.cpp | 262 case MipsISD::DPAX_W_PH: return "MipsISD::DPAX_W_PH"; in getTargetNodeName()
|
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
D | MipsGenSubtargetInfo.inc | 1096 {DBGFIELD("DPAX_W_PH") 1, false, false, 35, 1, 2, 1, 0, 0}, // #821 2116 {DBGFIELD("DPAX_W_PH") 0, false, false, 0, 0, 0, 0, 0, 0}, // #821
|
D | MipsGenMCCodeEmitter.inc | 1259 UINT64_C(2080375344), // DPAX_W_PH 2715 case Mips::DPAX_W_PH: 8985 Feature_HasDSPR2 | 0, // DPAX_W_PH = 1246
|
D | MipsGenInstrInfo.inc | 1261 DPAX_W_PH = 1246, 3478 DPAX_W_PH = 821, 5306 …, 1, 4, 821, 0, 0x6ULL, nullptr, nullptr, OperandInfo222, -1 ,nullptr }, // Inst #1246 = DPAX_W_PH 9751 { Mips::DPAX_W_PH, Mips::DPAX_W_PH, Mips::DPAX_W_PH_MMR2 },
|
D | MipsGenAsmWriter.inc | 2474 268457736U, // DPAX_W_PH 5105 0U, // DPAX_W_PH
|
D | MipsGenDisassemblerTables.inc | 5957 /* 15997 */ MCD::OPC_Decode, 222, 9, 229, 1, // Opcode: DPAX_W_PH
|
D | MipsGenDAGISel.inc | 26735 /* 50243*/ /*SwitchOpcode*/ 29, TARGET_VAL(MipsISD::DPAX_W_PH),// ->50275 26741 /* 50253*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::DPAX_W_PH), 0, 26744 …// Dst: (DPAX_W_PH:{ *:[Untyped] } GPR32Opnd:{ *:[i32] }:$rs, GPR32Opnd:{ *:[i32] }:$rt, ACC64DSPO…
|
D | MipsGenAsmMatcher.inc | 6055 …{ 3620 /* dpax.w.ph */, Mips::DPAX_W_PH, Convert__ACC64DSPAsmReg1_0__GPR32AsmReg1_1__GPR32AsmReg1_…
|
/external/capstone/arch/Mips/ |
D | MipsGenAsmWriter.inc | 610 33576114U, // DPAX_W_PH 2324 0U, // DPAX_W_PH
|
D | MipsGenDisassemblerTables.inc | 3425 /* 12417 */ MCD_OPC_Decode, 209, 4, 93, // Opcode: DPAX_W_PH
|