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Searched refs:MAQ_SA_W_PHL (Results 1 – 18 of 18) sorted by relevance

/external/llvm/lib/Target/Mips/
DMipsISelLowering.h125 MAQ_SA_W_PHL, enumerator
DMipsDSPInstrInfo.td52 def MipsMAQ_SA_W_PHL : MipsDSPSideEffectBase<"MAQ_SA_W_PHL", SDT_MipsDPA>;
1163 def MAQ_SA_W_PHL : DspMMRel, MAQ_SA_W_PHL_ENC, MAQ_SA_W_PHL_DESC;
DMipsSEISelLowering.cpp2216 return lowerDSPIntr(Op, DAG, MipsISD::MAQ_SA_W_PHL); in lowerINTRINSIC_W_CHAIN()
DMipsISelLowering.cpp166 case MipsISD::MAQ_SA_W_PHL: return "MipsISD::MAQ_SA_W_PHL"; in getTargetNodeName()
/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/
DMipsISelLowering.h177 MAQ_SA_W_PHL, enumerator
DMipsDSPInstrInfo.td53 def MipsMAQ_SA_W_PHL : MipsDSPSideEffectBase<"MAQ_SA_W_PHL", SDT_MipsDPA>;
1168 def MAQ_SA_W_PHL : DspMMRel, MAQ_SA_W_PHL_ENC, MAQ_SA_W_PHL_DESC;
DMipsScheduleGeneric.td572 def : InstRW<[GenericDSPShort], (instregex "^MAQ_SA_W_PHL$")>;
DMipsSEISelLowering.cpp2301 return lowerDSPIntr(Op, DAG, MipsISD::MAQ_SA_W_PHL); in lowerINTRINSIC_W_CHAIN()
DMipsISelLowering.cpp248 case MipsISD::MAQ_SA_W_PHL: return "MipsISD::MAQ_SA_W_PHL"; in getTargetNodeName()
/external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/
DMipsGenSubtargetInfo.inc1015 {DBGFIELD("MAQ_SA_W_PHL") 1, false, false, 35, 1, 2, 1, 0, 0}, // #740
2035 {DBGFIELD("MAQ_SA_W_PHL") 0, false, false, 0, 0, 0, 0, 0, 0}, // #740
DMipsGenMCCodeEmitter.inc1772 UINT64_C(2080375856), // MAQ_SA_W_PHL
2727 case Mips::MAQ_SA_W_PHL:
9498 Feature_HasDSP | 0, // MAQ_SA_W_PHL = 1759
DMipsGenInstrInfo.inc1774 MAQ_SA_W_PHL = 1759,
3397 MAQ_SA_W_PHL = 740,
5819 …cts), 0x6ULL, nullptr, ImplicitList13, OperandInfo222, -1 ,nullptr }, // Inst #1759 = MAQ_SA_W_PHL
9780 { Mips::MAQ_SA_W_PHL, Mips::MAQ_SA_W_PHL, Mips::MAQ_SA_W_PHL_MM },
DMipsGenAsmWriter.inc2987 268458070U, // MAQ_SA_W_PHL
5618 0U, // MAQ_SA_W_PHL
DMipsGenDisassemblerTables.inc5981 /* 16129 */ MCD::OPC_Decode, 223, 13, 229, 1, // Opcode: MAQ_SA_W_PHL
DMipsGenDAGISel.inc26454 /* 49739*/ /*SwitchOpcode*/ 32, TARGET_VAL(MipsISD::MAQ_SA_W_PHL),// ->49774
26462 /* 49751*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::MAQ_SA_W_PHL), 0|OPFL_Chain,
26465 …// Dst: (MAQ_SA_W_PHL:{ *:[Untyped] } GPR32Opnd:{ *:[i32] }:$rs, GPR32Opnd:{ *:[i32] }:$rt, ACC64D…
DMipsGenAsmMatcher.inc6572 …{ 5807 /* maq_sa.w.phl */, Mips::MAQ_SA_W_PHL, Convert__ACC64DSPAsmReg1_0__GPR32AsmReg1_1__GPR32As…
/external/capstone/arch/Mips/
DMipsGenAsmWriter.inc1026 33576436U, // MAQ_SA_W_PHL
2740 0U, // MAQ_SA_W_PHL
DMipsGenDisassemblerTables.inc3449 /* 12525 */ MCD_OPC_Decode, 241, 7, 93, // Opcode: MAQ_SA_W_PHL