Searched refs:MAQ_SA_W_PHR (Results 1 – 18 of 18) sorted by relevance
| /external/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.h | 126 MAQ_SA_W_PHR, enumerator
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| D | MipsDSPInstrInfo.td | 53 def MipsMAQ_SA_W_PHR : MipsDSPSideEffectBase<"MAQ_SA_W_PHR", SDT_MipsDPA>;
1164 def MAQ_SA_W_PHR : DspMMRel, MAQ_SA_W_PHR_ENC, MAQ_SA_W_PHR_DESC;
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| D | MipsSEISelLowering.cpp | 2218 return lowerDSPIntr(Op, DAG, MipsISD::MAQ_SA_W_PHR); in lowerINTRINSIC_W_CHAIN()
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| D | MipsISelLowering.cpp | 167 case MipsISD::MAQ_SA_W_PHR: return "MipsISD::MAQ_SA_W_PHR"; in getTargetNodeName()
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| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/Mips/ |
| D | MipsISelLowering.h | 178 MAQ_SA_W_PHR, enumerator
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| D | MipsDSPInstrInfo.td | 54 def MipsMAQ_SA_W_PHR : MipsDSPSideEffectBase<"MAQ_SA_W_PHR", SDT_MipsDPA>;
1169 def MAQ_SA_W_PHR : DspMMRel, MAQ_SA_W_PHR_ENC, MAQ_SA_W_PHR_DESC;
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| D | MipsScheduleGeneric.td | 573 def : InstRW<[GenericDSPShort], (instregex "^MAQ_SA_W_PHR$")>;
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| D | MipsSEISelLowering.cpp | 2303 return lowerDSPIntr(Op, DAG, MipsISD::MAQ_SA_W_PHR); in lowerINTRINSIC_W_CHAIN()
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| D | MipsISelLowering.cpp | 249 case MipsISD::MAQ_SA_W_PHR: return "MipsISD::MAQ_SA_W_PHR"; in getTargetNodeName()
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| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/Mips/ |
| D | MipsGenSubtargetInfo.inc | 1016 {DBGFIELD("MAQ_SA_W_PHR") 1, false, false, 35, 1, 2, 1, 0, 0}, // #741
2036 {DBGFIELD("MAQ_SA_W_PHR") 0, false, false, 0, 0, 0, 0, 0, 0}, // #741
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| D | MipsGenMCCodeEmitter.inc | 1774 UINT64_C(2080375984), // MAQ_SA_W_PHR
2728 case Mips::MAQ_SA_W_PHR:
9500 Feature_HasDSP | 0, // MAQ_SA_W_PHR = 1761
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| D | MipsGenInstrInfo.inc | 1776 MAQ_SA_W_PHR = 1761,
3398 MAQ_SA_W_PHR = 741,
5821 …cts), 0x6ULL, nullptr, ImplicitList13, OperandInfo222, -1 ,nullptr }, // Inst #1761 = MAQ_SA_W_PHR
9781 { Mips::MAQ_SA_W_PHR, Mips::MAQ_SA_W_PHR, Mips::MAQ_SA_W_PHR_MM },
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| D | MipsGenAsmWriter.inc | 2989 268458615U, // MAQ_SA_W_PHR
5620 0U, // MAQ_SA_W_PHR
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| D | MipsGenDisassemblerTables.inc | 5985 /* 16151 */ MCD::OPC_Decode, 225, 13, 229, 1, // Opcode: MAQ_SA_W_PHR
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| D | MipsGenDAGISel.inc | 26474 /* 49774*/ /*SwitchOpcode*/ 32, TARGET_VAL(MipsISD::MAQ_SA_W_PHR),// ->49809
26482 /* 49786*/ OPC_MorphNodeTo1, TARGET_VAL(Mips::MAQ_SA_W_PHR), 0|OPFL_Chain,
26485 …// Dst: (MAQ_SA_W_PHR:{ *:[Untyped] } GPR32Opnd:{ *:[i32] }:$rs, GPR32Opnd:{ *:[i32] }:$rt, ACC64D…
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| D | MipsGenAsmMatcher.inc | 6574 …{ 5820 /* maq_sa.w.phr */, Mips::MAQ_SA_W_PHR, Convert__ACC64DSPAsmReg1_0__GPR32AsmReg1_1__GPR32As…
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| /external/capstone/arch/Mips/ |
| D | MipsGenAsmWriter.inc | 1027 33576860U, // MAQ_SA_W_PHR
2741 0U, // MAQ_SA_W_PHR
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| D | MipsGenDisassemblerTables.inc | 3453 /* 12543 */ MCD_OPC_Decode, 242, 7, 93, // Opcode: MAQ_SA_W_PHR
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