| /external/compiler-rt/test/asan/TestCases/Linux/ |
| D | sized_delete_test.cc | 21 struct S20 { struct
63 Del12Ar(reinterpret_cast<S12*>(new S20[100])); in main()
64 Del12NoThrow(reinterpret_cast<S12*>(new S20)); in main()
65 Del12ArNoThrow(reinterpret_cast<S12*>(new S20[100])); in main()
72 Del12(reinterpret_cast<S12*>(new S20)); in main()
|
| /external/clang/test/PCH/ |
| D | cxx-key-functions.cpp | 28 struct S20 { virtual void f(); }; struct
84 S20, S21, S22, S23, S24, S25, S26, S27, S28, S29,
|
| /external/clang/test/CodeGenCXX/ |
| D | microsoft-abi-static-initializers.cpp | 79 static S S20; in MultipleStatics() local
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 176 case S20: case D20: return 20; in getARMRegisterNumbering()
|
| /external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 84 def S20 : ARMFReg<20, "s20">; def S21 : ARMFReg<21, "s21">;
103 def D10 : ARMReg<10, "d10", [S20, S21]>, DwarfRegNum<[266]>;
|
| D | ARMCallingConv.td | 96 CCIfType<[f32], CCAssignToReg<[S16, S17, S18, S19, S20, S21, S22, S23]>>,
|
| D | ARMBaseRegisterInfo.cpp | 715 case ARM::S21: return ARM::S20; in getRegisterPairEven()
768 case ARM::S20: return ARM::S21; in getRegisterPairOdd()
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 107 case AArch64::S20: in isOdd()
|
| D | AArch64RegisterInfo.td | 324 def S20 : AArch64Reg<20, "s20", [H20]>, DwarfRegAlias<B20>;
359 def D20 : AArch64Reg<20, "d20", [S20], ["v20", ""]>, DwarfRegAlias<B20>;
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64PBQPRegAlloc.cpp | 107 case AArch64::S20: in isOdd()
|
| D | AArch64RegisterInfo.td | 305 def S20 : AArch64Reg<20, "s20", [H20]>, DwarfRegAlias<B20>;
340 def D20 : AArch64Reg<20, "d20", [S20], ["v20", ""]>, DwarfRegAlias<B20>;
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 91 def S20 : ARMFReg<20, "s20">; def S21 : ARMFReg<21, "s21">;
110 def D10 : ARMReg<10, "d10", [S20, S21]>, DwarfRegNum<[266]>;
|
| D | ARMCallingConv.td | 112 CCIfType<[f32], CCAssignToReg<[S16, S17, S18, S19, S20, S21, S22, S23]>>,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 103 def S20 : ARMFReg<20, "s20">; def S21 : ARMFReg<21, "s21">;
122 def D10 : ARMReg<10, "d10", [S20, S21]>, DwarfRegNum<[266]>;
|
| D | ARMCallingConv.td | 112 CCIfType<[f32], CCAssignToReg<[S16, S17, S18, S19, S20, S21, S22, S23]>>,
|
| /external/iptables/utils/ |
| D | pf.os | 242 S20:64:1:60:M*,S,T,N,W0: Linux:2.2:20-25:Linux 2.2.20 and newer
430 S20:128:1:48:M*,N,N,S: Windows:2000::Windows 2000/XP SP3
431 S20:128:1:48:M*,N,N,S: Windows:XP:SP3:Windows 2000/XP SP3
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/Disassembler/ |
| D | PPCDisassembler.cpp | 235 PPC::S20, PPC::S21, PPC::S22, PPC::S23,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
| D | PPCCallingConv.td | 295 def CSR_SPE : CalleeSavedRegs<(add S14, S15, S16, S17, S18, S19, S20, S21, S22,
|
| D | PPCFrameLowering.cpp | 190 {PPC::S20, -96}, in getCalleeSavedSpillSlots()
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/ARM/ |
| D | ARMGenCallingConv.inc | 454 ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22, ARM::S23
|
| D | ARMGenRegisterInfo.inc | 119 S20 = 99,
1464 { ARM::S20 },
1514 …ARM::S13, ARM::S14, ARM::S15, ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22…
1524 …ARM::S13, ARM::S14, ARM::S15, ARM::S16, ARM::S17, ARM::S18, ARM::S19, ARM::S20, ARM::S21, ARM::S22…
5233 …, ARM::S6, ARM::S8, ARM::S10, ARM::S12, ARM::S14, ARM::S16, ARM::S18, ARM::S20, ARM::S22, ARM::S24…
5234 …static const MCPhysReg AltOrder2[] = { ARM::S0, ARM::S4, ARM::S8, ARM::S12, ARM::S16, ARM::S20, AR…
5251 …, ARM::S6, ARM::S8, ARM::S10, ARM::S12, ARM::S14, ARM::S16, ARM::S18, ARM::S20, ARM::S22, ARM::S24…
5252 …static const MCPhysReg AltOrder2[] = { ARM::S0, ARM::S4, ARM::S8, ARM::S12, ARM::S16, ARM::S20, AR…
|
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 310 AArch64::S20, AArch64::S21, AArch64::S22, AArch64::S23, AArch64::S24,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AArch64/Disassembler/ |
| D | AArch64Disassembler.cpp | 351 AArch64::S20, AArch64::S21, AArch64::S22, AArch64::S23, AArch64::S24,
|
| /external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/AsmParser/ |
| D | PPCAsmParser.cpp | 92 PPC::S20, PPC::S21, PPC::S22, PPC::S23,
|
| /external/swiftshader/third_party/llvm-7.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenRegisterInfo.inc | 193 S20 = 173,
2343 …h64::S15, AArch64::S16, AArch64::S17, AArch64::S18, AArch64::S19, AArch64::S20, AArch64::S21, AArc…
3872 { AArch64::S20, 84U },
4151 { AArch64::S20, 84U },
19336 …h64::S15, AArch64::S16, AArch64::S17, AArch64::S18, AArch64::S19, AArch64::S20, AArch64::S21, AArc…
19338 …h64::S15, AArch64::S16, AArch64::S17, AArch64::S18, AArch64::S19, AArch64::S20, AArch64::S21, AArc…
|