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Searched refs:TMP2 (Results 1 – 25 of 901) sorted by relevance

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/external/llvm-project/llvm/test/Transforms/InstCombine/
D	pull-conditional-binop-through-shift.ll	9 ; CHECK-NEXT: [[TMP2:%.]] = and i32 [[TMP1]], -16777216 10 ; CHECK-NEXT: [[R:%.]] = select i1 [[COND:%.]], i32 [[TMP2]], i32 [[TMP1]] 21 ; CHECK-NEXT: [[TMP2:%.]] = and i32 [[TMP1]], -16777216 22 ; CHECK-NEXT: [[R:%.]] = select i1 [[COND:%.]], i32 [[TMP2]], i32 [[TMP1]] 34 ; CHECK-NEXT: [[TMP2:%.]] = or i32 [[TMP1]], -16777216 35 ; CHECK-NEXT: [[R:%.]] = select i1 [[COND:%.]], i32 [[TMP2]], i32 [[TMP1]] 46 ; CHECK-NEXT: [[TMP2:%.]] = or i32 [[TMP1]], -16777216 47 ; CHECK-NEXT: [[R:%.]] = select i1 [[COND:%.]], i32 [[TMP2]], i32 [[TMP1]] 59 ; CHECK-NEXT: [[TMP2:%.]] = xor i32 [[TMP1]], -16777216 60 ; CHECK-NEXT: [[R:%.]] = select i1 [[COND:%.*]], i32 [[TMP2]], i32 [[TMP1]] [all …]
D	canonicalize-clamp-with-select-of-constant-threshold-pattern.ll	11 ; CHECK-NEXT: [[TMP2:%.]] = select i1 [[TMP1]], i32 [[X]], i32 -32768 12 ; CHECK-NEXT: [[TMP3:%.]] = icmp slt i32 [[TMP2]], 32767 13 ; CHECK-NEXT: [[R:%.]] = select i1 [[TMP3]], i32 [[TMP2]], i32 32767 26 ; CHECK-NEXT: [[TMP2:%.]] = select i1 [[TMP1]], i32 [[X]], i32 -32768 27 ; CHECK-NEXT: [[TMP3:%.]] = icmp slt i32 [[TMP2]], 32767 28 ; CHECK-NEXT: [[R:%.]] = select i1 [[TMP3]], i32 [[TMP2]], i32 32767 44 ; CHECK-NEXT: [[TMP2:%.]] = select i1 [[TMP1]], i32 [[X]], i32 -32768 45 ; CHECK-NEXT: [[TMP3:%.]] = icmp slt i32 [[TMP2]], 32767 46 ; CHECK-NEXT: [[R:%.]] = select i1 [[TMP3]], i32 [[TMP2]], i32 32767 59 ; CHECK-NEXT: [[TMP2:%.]] = select i1 [[TMP1]], i32 [[X]], i32 -32768 [all …]
D	canonicalize-signed-truncation-check.ll	19 ; CHECK-NEXT: [[TMP2:%.]] = icmp ugt i8 [[TMP1]], 7 20 ; CHECK-NEXT: ret i1 [[TMP2]] 32 ; CHECK-NEXT: [[TMP2:%.]] = icmp slt i65 [[TMP1]], 0 33 ; CHECK-NEXT: ret i1 [[TMP2]] 48 ; CHECK-NEXT: [[TMP2:%.]] = icmp ugt <2 x i8> [[TMP1]], <i8 7, i8 7> 49 ; CHECK-NEXT: ret <2 x i1> [[TMP2]] 61 ; CHECK-NEXT: [[TMP2:%.]] = icmp ne <2 x i8> [[TMP1]], [[X]] 62 ; CHECK-NEXT: ret <2 x i1> [[TMP2]] 74 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne <3 x i8> [[TMP1]], [[X]] 75 ; CHECK-NEXT: ret <3 x i1> [[TMP2]] [all …]
D	canonicalize-lack-of-signed-truncation-check.ll	19 ; CHECK-NEXT: [[TMP2:%.]] = icmp ult i8 [[TMP1]], 8 20 ; CHECK-NEXT: ret i1 [[TMP2]] 32 ; CHECK-NEXT: [[TMP2:%.]] = icmp sgt i65 [[TMP1]], -1 33 ; CHECK-NEXT: ret i1 [[TMP2]] 48 ; CHECK-NEXT: [[TMP2:%.]] = icmp ult <2 x i8> [[TMP1]], <i8 8, i8 8> 49 ; CHECK-NEXT: ret <2 x i1> [[TMP2]] 61 ; CHECK-NEXT: [[TMP2:%.]] = icmp eq <2 x i8> [[TMP1]], [[X]] 62 ; CHECK-NEXT: ret <2 x i1> [[TMP2]] 74 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq <3 x i8> [[TMP1]], [[X]] 75 ; CHECK-NEXT: ret <3 x i1> [[TMP2]] [all …]
D	demorgan-sink-not-into-xor.ll	26 ; CHECK-NEXT: [[TMP2:%.]] = icmp sgt i8 [[Y:%.]], -1 27 ; CHECK-NEXT: [[TMP4:%.]] = xor i1 [[TMP2]], [[TMP1]] 40 ; CHECK-NEXT: [[TMP2:%.]] = icmp sgt i8 [[Y:%.]], -1 41 ; CHECK-NEXT: [[TMP4:%.]] = xor i1 [[TMP2]], [[TMP1]] 54 ; CHECK-NEXT: [[TMP2:%.]] = icmp sgt i8 [[Y:%.]], -1 55 ; CHECK-NEXT: [[TMP4:%.]] = xor i1 [[TMP2]], [[TMP1]] 74 ; CHECK-NEXT: [[TMP2:%.]] = icmp slt i8 [[Y:%.]], 0 75 ; CHECK-NEXT: call void @use1(i1 [[TMP2]]) 76 ; CHECK-NEXT: [[TMP3:%.]] = xor i1 [[TMP1]], [[TMP2]] 91 ; CHECK-NEXT: [[TMP2:%.]] = icmp slt i8 [[Y:%.]], 0 [all …]
D	sign-test-and-or.ll	`9 ; CHECK-NEXT: [[TMP2:%.]] = icmp slt i32 [[TMP1]], 0 10 ; CHECK-NEXT: ret i1 [[TMP2]] 21 ; CHECK-NEXT: [[TMP2:%.]] = icmp sgt i32 [[TMP1]], -1 22 ; CHECK-NEXT: ret i1 [[TMP2]] 33 ; CHECK-NEXT: [[TMP2:%.]] = icmp slt i32 [[TMP1]], 0 34 ; CHECK-NEXT: ret i1 [[TMP2]] 45 ; CHECK-NEXT: [[TMP2:%.]] = icmp sgt i32 [[TMP1]], -1 46 ; CHECK-NEXT: ret i1 [[TMP2]] 57 ; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0 58 ; CHECK-NEXT: br i1 [[TMP2]], label %if.then, label %if.end [all …]`
D	ctpop-cttz.ll	11 ; CHECK-NEXT: [[TMP2:%.]] = call i32 @llvm.cttz.i32(i32 [[TMP0:%.]], i1 false), !range !0 12 ; CHECK-NEXT: ret i32 [[TMP2]] 23 ; CHECK-NEXT: [[TMP2:%.]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[TMP0:%.]], i1 false) 24 ; CHECK-NEXT: [[TMP3:%.]] = sub nuw nsw <2 x i32> <i32 32, i32 32>, [[TMP2]] 35 ; CHECK-NEXT: [[TMP2:%.]] = sub i32 0, [[TMP0:%.]] 36 ; CHECK-NEXT: [[TMP3:%.]] = or i32 [[TMP2]], [[TMP0]] 54 ; CHECK-NEXT: [[TMP2:%.]] = call i32 @llvm.cttz.i32(i32 [[TMP0:%.]], i1 false), !range !0 55 ; CHECK-NEXT: ret i32 [[TMP2]] 66 ; CHECK-NEXT: [[TMP2:%.]] = call <2 x i32> @llvm.cttz.v2i32(<2 x i32> [[TMP0:%.]], i1 false) 67 ; CHECK-NEXT: ret <2 x i32> [[TMP2]] [all …]
D	select-of-bittest.ll	11 ; CHECK-NEXT: [[TMP2:%.]] = icmp ne i32 [[TMP1]], 0 12 ; CHECK-NEXT: [[TMP4:%.]] = zext i1 [[TMP2]] to i32 26 ; CHECK-NEXT: [[TMP2:%.]] = icmp ne <2 x i32> [[TMP1]], zeroinitializer 27 ; CHECK-NEXT: [[TMP4:%.]] = zext <2 x i1> [[TMP2]] to <2 x i32> 41 ; CHECK-NEXT: [[TMP2:%.]] = icmp ne <2 x i32> [[TMP1]], zeroinitializer 42 ; CHECK-NEXT: [[TMP4:%.]] = zext <2 x i1> [[TMP2]] to <2 x i32> 56 ; CHECK-NEXT: [[TMP2:%.]] = icmp ne <2 x i32> [[TMP1]], zeroinitializer 57 ; CHECK-NEXT: [[TMP4:%.]] = zext <2 x i1> [[TMP2]] to <2 x i32> 71 ; CHECK-NEXT: [[TMP2:%.]] = icmp ne <2 x i32> [[TMP1]], zeroinitializer 72 ; CHECK-NEXT: [[TMP4:%.]] = zext <2 x i1> [[TMP2]] to <2 x i32> [all …]
D	sub-minmax.ll	`8 ; CHECK-NEXT: [[TMP2:%.]] = sub i32 0, [[TMP1]] 9 ; CHECK-NEXT: ret i32 [[TMP2]] 35 ; CHECK-NEXT: [[TMP2:%.]] = sub i32 0, [[TMP1]] 36 ; CHECK-NEXT: ret i32 [[TMP2]] 62 ; CHECK-NEXT: [[TMP2:%.]] = sub i32 0, [[TMP1]] 63 ; CHECK-NEXT: ret i32 [[TMP2]] 89 ; CHECK-NEXT: [[TMP2:%.]] = sub i32 0, [[TMP1]] 90 ; CHECK-NEXT: ret i32 [[TMP2]] 117 ; CHECK-NEXT: [[TMP2:%.]] = select i1 [[TMP1]], i32 [[A]], i32 -32 118 ; CHECK-NEXT: [[L1:%.]] = xor i32 [[TMP2]], -1 [all …]`
D	select-bitext-bitwise-ops.ll	7 ; CHECK-NEXT: [[TMP2:%.]] = and i32 [[TMP1]], 60 8 ; CHECK-NEXT: [[TMP3:%.]] = zext i32 [[TMP2]] to i64 24 ; CHECK-NEXT: [[TMP2:%.]] = and i32 [[TMP1]], 60 25 ; CHECK-NEXT: [[TMP3:%.]] = zext i32 [[TMP2]] to i64 41 ; CHECK-NEXT: [[TMP2:%.]] = and i32 [[TMP1]], 15 42 ; CHECK-NEXT: [[TMP3:%.]] = zext i32 [[TMP2]] to i64 58 ; CHECK-NEXT: [[TMP2:%.]] = and i32 [[TMP1]], 15 59 ; CHECK-NEXT: [[TMP3:%.]] = zext i32 [[TMP2]] to i64 75 ; CHECK-NEXT: [[TMP2:%.]] = and i32 [[TMP1]], -536870897 76 ; CHECK-NEXT: [[TMP3:%.]] = zext i32 [[TMP2]] to i64 [all …]
D	and-narrow.ll	10 ; CHECK-NEXT: [[TMP2:%.]] = and i8 [[TMP1]], [[X]] 11 ; CHECK-NEXT: [[R:%.]] = zext i8 [[TMP2]] to i16 23 ; CHECK-NEXT: [[TMP2:%.]] = and i8 [[TMP1]], [[X]] 24 ; CHECK-NEXT: [[R:%.]] = zext i8 [[TMP2]] to i16 36 ; CHECK-NEXT: [[TMP2:%.]] = and i8 [[TMP1]], [[X]] 37 ; CHECK-NEXT: [[R:%.]] = zext i8 [[TMP2]] to i16 49 ; CHECK-NEXT: [[TMP2:%.]] = and i8 [[TMP1]], [[X]] 50 ; CHECK-NEXT: [[R:%.]] = zext i8 [[TMP2]] to i16 62 ; CHECK-NEXT: [[TMP2:%.]] = and i8 [[TMP1]], [[X]] 63 ; CHECK-NEXT: [[R:%.]] = zext i8 [[TMP2]] to i16 [all …]
D	bswap-fold.ll	91 ; CHECK-NEXT: [[TMP2:%.]] = call i16 @llvm.bswap.i16(i16 [[TMP1]]) 92 ; CHECK-NEXT: ret i16 [[TMP2]] 102 ; CHECK-NEXT: [[TMP2:%.]] = call i16 @llvm.bswap.i16(i16 [[TMP1]]) 103 ; CHECK-NEXT: ret i16 [[TMP2]] 114 ; CHECK-NEXT: [[TMP2:%.]] = call i16 @llvm.bswap.i16(i16 [[TMP1]]) 115 ; CHECK-NEXT: ret i16 [[TMP2]] 126 ; CHECK-NEXT: [[TMP2:%.]] = call i16 @llvm.bswap.i16(i16 [[TMP1]]) 127 ; CHECK-NEXT: ret i16 [[TMP2]] 138 ; CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.bswap.i32(i32 [[TMP1]]) 139 ; CHECK-NEXT: ret i32 [[TMP2]] [all …]
D	pow-4.ll	50 ; CHECK-NEXT: [[TMP2:%.]] = fmul fast <2 x float> [[TMP1]], [[TMP1]] 51 ; CHECK-NEXT: [[TMP3:%.]] = fmul fast <2 x float> [[TMP2]], [[TMP2]] 64 ; CHECK-NEXT: [[TMP2:%.]] = fmul fast <2 x double> [[TMP1]], [[X]] 65 ; CHECK-NEXT: [[TMP3:%.]] = fmul fast <2 x double> [[SQUARE]], [[TMP2]] 78 ; CHECK-NEXT: [[TMP2:%.]] = fmul fast float [[TMP1]], [[TMP1]] 79 ; CHECK-NEXT: [[TMP3:%.]] = fmul fast float [[TMP2]], [[TMP2]] 104 ; CHECK-NEXT: [[TMP2:%.]] = fmul fast float [[TMP1]], [[TMP1]] 105 ; CHECK-NEXT: [[TMP3:%.]] = fmul fast float [[TMP2]], [[TMP2]] 129 ; CHECK-NEXT: [[TMP2:%.]] = fmul fast double [[TMP1]], [[TMP1]] 130 ; CHECK-NEXT: [[TMP3:%.]] = fmul fast double [[TMP2]], [[TMP2]] [all …]
D	and-or-icmps.ll	`31 ; CHECK-NEXT: [[TMP2:%.]] = icmp ult i32 [[TMP1]], 8 32 ; CHECK-NEXT: ret i1 [[TMP2]] 47 ; CHECK-NEXT: [[TMP2:%.]] = icmp eq i32 [[TMP1]], 50 48 ; CHECK-NEXT: ret i1 [[TMP2]] 61 ; CHECK-NEXT: [[TMP2:%.]] = icmp ne i32 [[TMP1]], 50 62 ; CHECK-NEXT: ret i1 [[TMP2]] 75 ; CHECK-NEXT: [[TMP2:%.]] = icmp eq i32 [[TMP1]], 65 76 ; CHECK-NEXT: ret i1 [[TMP2]] 87 ; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i19 [[TMP1]], 65 88 ; CHECK-NEXT: ret i1 [[TMP2]] [all …]`
D	vector-udiv.ll	26 ; CHECK-NEXT: [[TMP2:%.]] = zext <4 x i1> [[TMP1]] to <4 x i32> 27 ; CHECK-NEXT: ret <4 x i32> [[TMP2]] 36 ; CHECK-NEXT: [[TMP2:%.]] = zext <4 x i1> [[TMP1]] to <4 x i32> 37 ; CHECK-NEXT: ret <4 x i32> [[TMP2]] 55 ; CHECK-NEXT: [[TMP2:%.]] = lshr <4 x i32> [[A0:%.]], [[TMP1]] 56 ; CHECK-NEXT: ret <4 x i32> [[TMP2]] 66 ; CHECK-NEXT: [[TMP2:%.]] = lshr <4 x i32> [[A0:%.]], [[TMP1]] 67 ; CHECK-NEXT: ret <4 x i32> [[TMP2]] 78 ; CHECK-NEXT: [[TMP2:%.]] = zext <4 x i16> [[TMP1]] to <4 x i32> 79 ; CHECK-NEXT: [[TMP3:%.]] = lshr <4 x i32> [[A0:%.*]], [[TMP2]] [all …]
D	shift-logic.ll	7 ; CHECK-NEXT: [[TMP2:%.]] = shl i8 [[Y:%.]], 2 8 ; CHECK-NEXT: [[SH1:%.]] = and i8 [[TMP1]], [[TMP2]] 20 ; CHECK-NEXT: [[TMP2:%.]] = shl <2 x i8> [[Y:%.]], <i8 2, i8 0> 21 ; CHECK-NEXT: [[SH1:%.]] = and <2 x i8> [[TMP1]], [[TMP2]] 34 ; CHECK-NEXT: [[TMP2:%.]] = shl nsw i16 [[Y]], 7 35 ; CHECK-NEXT: [[SH1:%.]] = or i16 [[TMP1]], [[TMP2]] 49 ; CHECK-NEXT: [[TMP2:%.]] = shl <2 x i16> [[Y]], <i16 7, i16 undef> 50 ; CHECK-NEXT: [[SH1:%.]] = or <2 x i16> [[TMP1]], [[TMP2]] 63 ; CHECK-NEXT: [[TMP2:%.]] = shl i32 [[Y:%.]], 7 64 ; CHECK-NEXT: [[SH1:%.*]] = xor i32 [[TMP1]], [[TMP2]] [all …]
/external/llvm-project/llvm/test/Instrumentation/PoisonChecking/
D	basic-flag-validation.ll	18 ; CHECK-NEXT: [[TMP2:%.]] = extractvalue { i32, i1 } [[TMP1]], 1 20 ; CHECK-NEXT: [[TMP3:%.]] = xor i1 [[TMP2]], true 31 ; CHECK-NEXT: [[TMP2:%.]] = extractvalue { i32, i1 } [[TMP1]], 1 33 ; CHECK-NEXT: [[TMP3:%.]] = xor i1 [[TMP2]], true 44 ; CHECK-NEXT: [[TMP2:%.]] = extractvalue { i32, i1 } [[TMP1]], 1 47 ; CHECK-NEXT: [[TMP5:%.]] = or i1 [[TMP2]], [[TMP4]] 69 ; CHECK-NEXT: [[TMP2:%.]] = extractvalue { i32, i1 } [[TMP1]], 1 71 ; CHECK-NEXT: [[TMP3:%.]] = xor i1 [[TMP2]], true 82 ; CHECK-NEXT: [[TMP2:%.]] = extractvalue { i32, i1 } [[TMP1]], 1 84 ; CHECK-NEXT: [[TMP3:%.]] = xor i1 [[TMP2]], true [all …]
D	ub-checks.ll	11 ; CHECK-NEXT: [[TMP2:%.]] = extractvalue { i32, i1 } [[TMP1]], 1 14 ; CHECK-NEXT: [[TMP3:%.]] = xor i1 [[TMP2]], true 28 ; CHECK-NEXT: [[TMP2:%.]] = extractvalue { i32, i1 } [[TMP1]], 1 31 ; CHECK-NEXT: [[TMP3:%.]] = xor i1 [[TMP2]], true 45 ; CHECK-NEXT: [[TMP2:%.]] = extractvalue { i32, i1 } [[TMP1]], 1 48 ; CHECK-NEXT: [[TMP3:%.]] = xor i1 [[TMP2]], true 62 ; CHECK-NEXT: [[TMP2:%.]] = extractvalue { i32, i1 } [[TMP1]], 1 65 ; CHECK-NEXT: [[TMP3:%.]] = xor i1 [[TMP2]], true 79 ; CHECK-NEXT: [[TMP2:%.]] = extractvalue { i32, i1 } [[TMP1]], 1 81 ; CHECK-NEXT: [[TMP3:%.]] = xor i1 [[TMP2]], true [all …]
/external/pcre/dist2/src/
D	pcre2_jit_compile.c	556 #define TMP2 SLJIT_R3 macro 559 #define TMP2 SLJIT_R2 macro 2223 OP1(SLJIT_MOV, TMP2, 0, SLJIT_MEM1(SLJIT_SP), OVECTOR(offset + 1)); in init_frame() 2226 OP1(SLJIT_MOV, SLJIT_MEM1(STACK_TOP), stackpos, TMP2, 0); in init_frame() 2582 base_reg = TMP2; in copy_recurse_data() 2592 if (base_reg != TMP2) in copy_recurse_data() 2594 status.tmp_regs[1] = TMP2; in copy_recurse_data() 2595 status.saved_tmp_regs[1] = TMP2; in copy_recurse_data() 3186 OP2(SLJIT_ADD, TMP2, 0, TMP1, 0, SLJIT_IMM, size - uncleared_size); in reset_early_fail() 3193 CMPTO(SLJIT_LESS, TMP1, 0, TMP2, 0, loop); in reset_early_fail() [all …]
/external/llvm-project/llvm/test/Analysis/ValueTracking/
D	assume-queries-counter.ll	18 ; COUNTER2-NEXT: [[TMP2:%.]] = icmp eq i32 [[TMP0]], null 19 ; COUNTER2-NEXT: ret i1 [[TMP2]] 23 ; COUNTER3-NEXT: [[TMP2:%.]] = icmp eq i32 [[TMP0]], null 24 ; COUNTER3-NEXT: ret i1 [[TMP2]] 33 ; COUNTER1-NEXT: [[TMP2:%.]] = icmp eq i32 [[TMP0:%.]], null 35 ; COUNTER1-NEXT: ret i1 [[TMP2]] 42 ; COUNTER3-NEXT: [[TMP2:%.]] = icmp eq i32* [[TMP0:%.]], null 44 ; COUNTER3-NEXT: ret i1 [[TMP2]] 58 ; COUNTER1-NEXT: [[TMP2:%.]] = icmp eq i32* [[TMP0]], null 59 ; COUNTER1-NEXT: br i1 [[TMP2]], label [[TMP5:%.]], label [[TMP3:%.]] [all …]
/external/llvm-project/llvm/test/Transforms/MemCpyOpt/
D	fca2memcpy.ll	13 ; CHECK-NEXT: [[TMP2:%.]] = bitcast %S [[SRC:%.]] to i8 14 ; CHECK-NEXT: call void @llvm.memmove.p0i8.p0i8.i64(i8* align 8 [[TMP1]], i8* align 8 [[TMP2]], … 25 ; CHECK-NEXT: [[TMP2:%.]] = bitcast %S [[SRC:%.]] to i8 26 ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP1]], i8* align 8 [[TMP2]], i… 37 ; CHECK-NEXT: [[TMP2:%.]] = bitcast %S [[SRC:%.]] to i8 38 ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP1]], i8* align 8 [[TMP2]], i… 49 ; CHECK-NEXT: [[TMP2:%.]] = bitcast %S [[SRC]] to i8* 50 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 [[TMP2]], i8 0, i64 16, i1 false) 63 ; CHECK-NEXT: [[TMP2:%.]] = bitcast %S [[DST:%.]] to i8 65 ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP2]], i8* align 8 [[TMP3]], i… [all …]
/external/llvm-project/llvm/test/Transforms/Reassociate/
D	mulfactor.ll	39 ; CHECK-NEXT: [[TMP2:%.]] = mul i32 [[TMP1]], [[TMP1]] 40 ; CHECK-NEXT: [[TMP3:%.]] = mul i32 [[TMP2]], [[TMP2]] 57 ; CHECK-NEXT: [[TMP2:%.]] = mul i32 [[TMP1]], [[X]] 58 ; CHECK-NEXT: [[TMP3:%.]] = mul i32 [[TMP2]], [[X]] 59 ; CHECK-NEXT: [[F:%.]] = mul i32 [[TMP3]], [[TMP2]] 75 ; CHECK-NEXT: [[TMP2:%.]] = mul i32 [[TMP1]], [[Y:%.]] 76 ; CHECK-NEXT: [[TMP3:%.]] = mul i32 [[TMP2]], [[TMP2]] 91 ; CHECK-NEXT: [[TMP2:%.]] = mul i32 [[TMP1]], [[Y:%.]] 93 ; CHECK-NEXT: [[G:%.]] = mul i32 [[F]], [[TMP2]] 94 ; CHECK-NEXT: [[TMP3:%.]] = mul i32 [[G]], [[TMP2]] [all …]
/external/boringssl/src/crypto/cipher_extra/asm/
D	aes128gcmsiv-x86_64.pl	`86 my $TMP2 = "%xmm3"; 97 vpclmulqdq \$0x10, $TMP0, $T, $TMP2 99 vpxor $TMP3, $TMP2, $TMP2 100 vpslldq \$8, $TMP2, $TMP3 101 vpsrldq \$8, $TMP2, $TMP2 103 vpxor $TMP2, $TMP4, $TMP4 105 vpclmulqdq \$0x10, poly(%rip), $TMP1, $TMP2 107 vpxor $TMP3, $TMP2, $TMP1 109 vpclmulqdq \$0x10, poly(%rip), $TMP1, $TMP2 111 vpxor $TMP3, $TMP2, $TMP1 [all …]`
/external/llvm-project/llvm/test/Transforms/InstCombine/ARM/
D	vld1.ll	34 ; CHECK-NEXT: [[TMP2:%.]] = load <8 x i8>, <8 x i8> [[TMP1]], align 1 35 ; CHECK-NEXT: ret <8 x i8> [[TMP2]] 44 ; CHECK-NEXT: [[TMP2:%.]] = load <4 x i16>, <4 x i16> [[TMP1]], align 2 45 ; CHECK-NEXT: ret <4 x i16> [[TMP2]] 54 ; CHECK-NEXT: [[TMP2:%.]] = load <2 x i32>, <2 x i32> [[TMP1]], align 4 55 ; CHECK-NEXT: ret <2 x i32> [[TMP2]] 64 ; CHECK-NEXT: [[TMP2:%.]] = load <1 x i64>, <1 x i64> [[TMP1]], align 8 65 ; CHECK-NEXT: ret <1 x i64> [[TMP2]] 74 ; CHECK-NEXT: [[TMP2:%.]] = load <8 x i16>, <8 x i16> [[TMP1]], align 2 75 ; CHECK-NEXT: ret <8 x i16> [[TMP2]] [all …]
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
D	amdgpu-codegenprepare-i16-to-i32.ll	13 ; VI-NEXT: [[TMP2:%.]] = zext i3 [[B:%.]] to i32 14 ; VI-NEXT: [[TMP3:%.]] = add nuw nsw i32 [[TMP1]], [[TMP2]] 32 ; VI-NEXT: [[TMP2:%.]] = zext i3 [[B:%.]] to i32 33 ; VI-NEXT: [[TMP3:%.]] = add nuw nsw i32 [[TMP1]], [[TMP2]] 51 ; VI-NEXT: [[TMP2:%.]] = zext i3 [[B:%.]] to i32 52 ; VI-NEXT: [[TMP3:%.]] = add nuw nsw i32 [[TMP1]], [[TMP2]] 70 ; VI-NEXT: [[TMP2:%.]] = zext i3 [[B:%.]] to i32 71 ; VI-NEXT: [[TMP3:%.]] = add nuw nsw i32 [[TMP1]], [[TMP2]] 89 ; VI-NEXT: [[TMP2:%.]] = zext i3 [[B:%.]] to i32 90 ; VI-NEXT: [[TMP3:%.*]] = sub nsw i32 [[TMP1]], [[TMP2]] [all …]

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