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Searched refs:ven5 (Results 1 – 21 of 21) sorted by relevance

/external/XNNPACK/src/f32-velu/gen/
Dvelu-avx-rr2-lut4-p4-perm-x48.c84 __m256 ven5 = _mm256_andnot_ps(vindex_mask, vn5); in xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x48() local
86 …128 ven5_lo = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_castps256_ps128(ven5)), 21)); in xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x48()
99 …8 ven5_hi = _mm_castsi128_ps(_mm_slli_epi32(_mm_castps_si128(_mm256_extractf128_ps(ven5, 1)), 21)); in xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x48()
112 ven5 = _mm256_insertf128_ps(_mm256_castps128_ps256(ven5_lo), ven5_hi, 1); in xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x48()
125 __m256 vs5 = _mm256_mul_ps(vl5, ven5); in xnn_f32_velu_ukernel__avx_rr2_lut4_p4_perm_x48()
Dvelu-wasm-rr2-lut16-p3-x6.c81 const uint32_t ven5 = fp32_to_bits(vn5) << 19; in xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x6() local
96 float vs5 = fp32_from_bits(xnn_table_exp2minus_k_over_16[vidx5] + ven5); in xnn_f32_velu_ukernel__wasm_rr2_lut16_p3_x6()
Dvelu-scalar-rr2-lut16-p3-x6.c81 const uint32_t ven5 = fp32_to_bits(vn5) << 19; in xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x6() local
96 float vs5 = fp32_from_bits(xnn_table_exp2minus_k_over_16[vidx5] + ven5); in xnn_f32_velu_ukernel__scalar_rr2_lut16_p3_x6()
Dvelu-avx2-rr1-lut16-p3-gather-x48.c88 const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 19); in xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x48() local
101 __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5)); in xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x48()
Dvelu-avx2-rr1-lut8-p4-perm-x48.c80 const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 20); in xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x48() local
94 __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5)); in xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x48()
Dvelu-avx2-rr1-lut4-p4-perm-x48.c81 const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 21); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48() local
95 __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5)); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x48()
Dvelu-avx512f-rr1-lut16-p3-perm-x96.c75 const __m512i ven5 = _mm512_slli_epi32(_mm512_castps_si512(vn5), 19); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x96() local
88 __m512 vs5 = _mm512_castsi512_ps(_mm512_add_epi32(vl5, ven5)); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x96()
Dvelu-avx512f-rr1-lut16-p3-perm-x112.c78 const __m512i ven5 = _mm512_slli_epi32(_mm512_castps_si512(vn5), 19); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112() local
93 __m512 vs5 = _mm512_castsi512_ps(_mm512_add_epi32(vl5, ven5)); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x112()
Dvelu-avx2-rr1-lut4-p4-perm-x56.c84 const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 21); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56() local
101 __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5)); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x56()
Dvelu-avx2-rr1-lut16-p3-gather-x56.c93 const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 19); in xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x56() local
108 __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5)); in xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x56()
Dvelu-avx512f-rr1-lut16-p3-perm-x128.c81 const __m512i ven5 = _mm512_slli_epi32(_mm512_castps_si512(vn5), 19); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128() local
98 __m512 vs5 = _mm512_castsi512_ps(_mm512_add_epi32(vl5, ven5)); in xnn_f32_velu_ukernel__avx512f_rr1_lut16_p3_perm_x128()
Dvelu-avx2-rr1-lut8-p4-perm-x56.c83 const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 20); in xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x56() local
100 __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5)); in xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x56()
Dvelu-avx2-rr1-lut4-p4-perm-x64.c87 const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 21); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64() local
107 __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5)); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x64()
Dvelu-avx2-rr1-lut16-p3-gather-x64.c98 const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 19); in xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x64() local
115 __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5)); in xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x64()
Dvelu-avx2-rr1-lut8-p4-perm-x64.c86 const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 20); in xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x64() local
106 __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5)); in xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x64()
Dvelu-avx2-rr1-lut4-p4-perm-x72.c90 const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 21); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72() local
113 __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5)); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x72()
Dvelu-avx2-rr1-lut16-p3-gather-x72.c103 const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 19); in xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x72() local
122 __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5)); in xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x72()
Dvelu-avx2-rr1-lut8-p4-perm-x72.c89 const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 20); in xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x72() local
112 __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5)); in xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x72()
Dvelu-avx2-rr1-lut8-p4-perm-x80.c92 const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 20); in xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x80() local
118 __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5)); in xnn_f32_velu_ukernel__avx2_rr1_lut8_p4_perm_x80()
Dvelu-avx2-rr1-lut16-p3-gather-x80.c108 const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 19); in xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x80() local
129 __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5)); in xnn_f32_velu_ukernel__avx2_rr1_lut16_p3_gather_x80()
Dvelu-avx2-rr1-lut4-p4-perm-x80.c93 const __m256i ven5 = _mm256_slli_epi32(_mm256_castps_si256(vn5), 21); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80() local
119 __m256 vs5 = _mm256_castsi256_ps(_mm256_add_epi32(vl5, ven5)); in xnn_f32_velu_ukernel__avx2_rr1_lut4_p4_perm_x80()