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/external/llvm-project/llvm/test/CodeGen/RISCV/
Dcalling-conv-ilp32d.ll4 ; RUN: | FileCheck -check-prefix=RV32-ILP32D %s
10 ; RV32-ILP32D-LABEL: callee_double_in_fpr:
11 ; RV32-ILP32D: # %bb.0:
12 ; RV32-ILP32D-NEXT: fcvt.w.d a1, fa0, rtz
13 ; RV32-ILP32D-NEXT: add a0, a0, a1
14 ; RV32-ILP32D-NEXT: ret
21 ; RV32-ILP32D-LABEL: caller_double_in_fpr:
22 ; RV32-ILP32D: # %bb.0:
23 ; RV32-ILP32D-NEXT: addi sp, sp, -16
24 ; RV32-ILP32D-NEXT: sw ra, 12(sp)
[all …]
Dcalling-conv-ilp32f-ilp32d-common.ll4 ; RUN: | FileCheck -check-prefix=RV32-ILP32FD %s
7 ; RUN: | FileCheck -check-prefix=RV32-ILP32FD %s
13 ; RV32-ILP32FD-LABEL: callee_float_in_fpr:
14 ; RV32-ILP32FD: # %bb.0:
15 ; RV32-ILP32FD-NEXT: fcvt.w.s a1, fa0, rtz
16 ; RV32-ILP32FD-NEXT: add a0, a0, a1
17 ; RV32-ILP32FD-NEXT: ret
24 ; RV32-ILP32FD-LABEL: caller_float_in_fpr:
25 ; RV32-ILP32FD: # %bb.0:
26 ; RV32-ILP32FD-NEXT: addi sp, sp, -16
[all …]
Dinterrupt-attr-callee.ll3 ; RUN: 2>&1 | FileCheck %s -check-prefix CHECK-RV32
5 ; RUN: 2>&1 | FileCheck %s -check-prefix CHECK-RV32-F
7 ; RUN: 2>&1 | FileCheck %s -check-prefix CHECK-RV32-FD
14 ; CHECK-RV32-LABEL: handler:
15 ; CHECK-RV32: # %bb.0: # %entry
16 ; CHECK-RV32-NEXT: addi sp, sp, -16
17 ; CHECK-RV32-NEXT: sw ra, 12(sp)
18 ; CHECK-RV32-NEXT: sw s0, 8(sp)
19 ; CHECK-RV32-NEXT: lui a0, 2
20 ; CHECK-RV32-NEXT: addi a0, a0, 4
[all …]
Dframe-info.ll2 ; RUN: llc -mtriple=riscv32 < %s | FileCheck -check-prefix=RV32 %s
5 ; RUN: | FileCheck -check-prefix=RV32-WITHFP %s
10 ; RV32-LABEL: trivial:
11 ; RV32: # %bb.0:
12 ; RV32-NEXT: ret
18 ; RV32-WITHFP-LABEL: trivial:
19 ; RV32-WITHFP: # %bb.0:
20 ; RV32-WITHFP-NEXT: addi sp, sp, -16
21 ; RV32-WITHFP-NEXT: .cfi_def_cfa_offset 16
22 ; RV32-WITHFP-NEXT: sw ra, 12(sp)
[all …]
Dshadowcallstack.ll3 ; RUN: | FileCheck %s --check-prefix=RV32
8 ; RV32-LABEL: f1:
9 ; RV32: # %bb.0:
10 ; RV32-NEXT: ret
21 ; RV32-LABEL: f2:
22 ; RV32: # %bb.0:
23 ; RV32-NEXT: tail foo
35 ; RV32-LABEL: f3:
36 ; RV32: # %bb.0:
37 ; RV32-NEXT: sw ra, 0(s2)
[all …]
Dinterrupt-attr.ll3 ; RUN: 2>&1 | FileCheck %s -check-prefix CHECK -check-prefix CHECK-RV32
5 ; RUN: 2>&1 | FileCheck %s -check-prefix CHECK -check-prefix CHECK-RV32-F
7 ; RUN: 2>&1 | FileCheck %s -check-prefix CHECK -check-prefix CHECK-RV32-FD
54 ; CHECK-RV32-LABEL: foo_with_call:
55 ; CHECK-RV32: # %bb.0:
56 ; CHECK-RV32-NEXT: addi sp, sp, -64
57 ; CHECK-RV32-NEXT: sw ra, 60(sp)
58 ; CHECK-RV32-NEXT: sw t0, 56(sp)
59 ; CHECK-RV32-NEXT: sw t1, 52(sp)
60 ; CHECK-RV32-NEXT: sw t2, 48(sp)
[all …]
Dtls-models.ll3 ; RUN: | FileCheck -check-prefix=RV32-PIC %s
6 ; RUN: llc -mtriple=riscv32 < %s | FileCheck -check-prefix=RV32-NOPIC %s
22 ; RV32-PIC-LABEL: f1:
23 ; RV32-PIC: # %bb.0: # %entry
24 ; RV32-PIC-NEXT: addi sp, sp, -16
25 ; RV32-PIC-NEXT: sw ra, 12(sp)
26 ; RV32-PIC-NEXT: .LBB0_1: # %entry
27 ; RV32-PIC-NEXT: # Label of block must be emitted
28 ; RV32-PIC-NEXT: auipc a0, %tls_gd_pcrel_hi(unspecified)
29 ; RV32-PIC-NEXT: addi a0, a0, %pcrel_lo(.LBB0_1)
[all …]
Dfastcc-int.ll3 ; RUN: | FileCheck -check-prefix=RV32 %s
8 ; RV32-LABEL: callee:
9 ; RV32: # %bb.0:
10 ; RV32-NEXT: ret
22 ; RV32-LABEL: caller:
23 ; RV32: # %bb.0:
24 ; RV32-NEXT: addi sp, sp, -32
25 ; RV32-NEXT: sw ra, 28(sp)
26 ; RV32-NEXT: sw s0, 24(sp)
27 ; RV32-NEXT: lw t0, 0(a0)
[all …]
Dneg-abs.ll2 … llc < %s -verify-machineinstrs -mtriple=riscv32-unknown-unknown | FileCheck %s --check-prefix=RV32
9 ; RV32-LABEL: neg_abs32:
10 ; RV32: # %bb.0:
11 ; RV32-NEXT: srai a1, a0, 31
12 ; RV32-NEXT: xor a0, a0, a1
13 ; RV32-NEXT: sub a0, a1, a0
14 ; RV32-NEXT: ret
28 ; RV32-LABEL: select_neg_abs32:
29 ; RV32: # %bb.0:
30 ; RV32-NEXT: srai a1, a0, 31
[all …]
Dlegalize-fneg.ll3 ; RUN: | FileCheck -check-prefix=RV32 %s
8 ; RV32-LABEL: test1:
9 ; RV32: # %bb.0: # %entry
10 ; RV32-NEXT: lw a1, 0(a1)
11 ; RV32-NEXT: lui a2, 524288
12 ; RV32-NEXT: xor a1, a1, a2
13 ; RV32-NEXT: sw a1, 0(a0)
14 ; RV32-NEXT: ret
32 ; RV32-LABEL: test2:
33 ; RV32: # %bb.0: # %entry
[all …]
Dinterrupt-attr-nocall.ll3 ; RUN: 2>&1 | FileCheck %s -check-prefix CHECK-RV32
26 ; CHECK-RV32-LABEL: foo_i32:
27 ; CHECK-RV32: # %bb.0:
28 ; CHECK-RV32-NEXT: addi sp, sp, -16
29 ; CHECK-RV32-NEXT: sw a0, 12(sp)
30 ; CHECK-RV32-NEXT: sw a1, 8(sp)
31 ; CHECK-RV32-NEXT: lui a0, %hi(a)
32 ; CHECK-RV32-NEXT: lw a0, %lo(a)(a0)
33 ; CHECK-RV32-NEXT: lui a1, %hi(b)
34 ; CHECK-RV32-NEXT: lw a1, %lo(b)(a1)
[all …]
Dmir-target-flags.ll4 ; RUN: FileCheck %s -check-prefix=RV32-SMALL
9 ; RUN: FileCheck %s -check-prefix=RV32-MED
24 ; RV32-SMALL-LABEL: name: caller
25 ; RV32-SMALL: target-flags(riscv-hi) @g_e
26 ; RV32-SMALL-NEXT: target-flags(riscv-lo) @g_e
27 ; RV32-SMALL-NEXT: target-flags(riscv-hi) @g_i
28 ; RV32-SMALL-NEXT: target-flags(riscv-lo) @g_i
29 ; RV32-SMALL: target-flags(riscv-tls-got-hi) @t_un
30 ; RV32-SMALL-NEXT: target-flags(riscv-pcrel-lo) %bb.1
31 ; RV32-SMALL: target-flags(riscv-tls-got-hi) @t_ld
[all …]
Dpic-models.ll3 ; RUN: | FileCheck -check-prefix=RV32-STATIC %s
5 ; RUN: | FileCheck -check-prefix=RV32-PIC %s
21 ; RV32-STATIC-LABEL: f1:
22 ; RV32-STATIC: # %bb.0: # %entry
23 ; RV32-STATIC-NEXT: lui a0, %hi(external_var)
24 ; RV32-STATIC-NEXT: addi a0, a0, %lo(external_var)
25 ; RV32-STATIC-NEXT: ret
27 ; RV32-PIC-LABEL: f1:
28 ; RV32-PIC: # %bb.0: # %entry
29 ; RV32-PIC-NEXT: .LBB0_1: # %entry
[all …]
Dcmp-bool.ll2 ; RUN: llc -mtriple=riscv32 < %s | FileCheck --check-prefix=RV32 %s
6 ; RV32-LABEL: bool_eq:
7 ; RV32: # %bb.0: # %entry
8 ; RV32-NEXT: beq a0, a1, .LBB0_2
9 ; RV32-NEXT: # %bb.1: # %if.end
10 ; RV32-NEXT: ret
11 ; RV32-NEXT: .LBB0_2: # %if.then
12 ; RV32-NEXT: jr a2
34 ; RV32-LABEL: bool_ne:
35 ; RV32: # %bb.0: # %entry
[all …]
Dsdata-limit-8.ll1 ; RUN: llc -mtriple=riscv32 < %s | FileCheck -check-prefix=RV32 %s
12 ; RV32: .section .sbss
13 ; RV32: .section .sdata
Dsdata-limit-0.ll1 ; RUN: llc -mtriple=riscv32 < %s | FileCheck -check-prefix=RV32 %s
11 ; RV32-NOT: .section .sbss
12 ; RV32-NOT: .section .sdata
/external/llvm-project/lld/test/ELF/
Demulation-riscv.s5 # RUN: llvm-readobj --file-headers %t | FileCheck --check-prefix=RV32 %s
7 # RUN: llvm-readobj --file-headers %t | FileCheck --check-prefix=RV32 %s
10 # RUN: llvm-readobj --file-headers %t | FileCheck --check-prefix=RV32 %s
12 # RV32: ElfHeader {
13 # RV32-NEXT: Ident {
14 # RV32-NEXT: Magic: (7F 45 4C 46)
15 # RV32-NEXT: Class: 32-bit (0x1)
16 # RV32-NEXT: DataEncoding: LittleEndian (0x1)
17 # RV32-NEXT: FileVersion: 1
18 # RV32-NEXT: OS/ABI: SystemV (0x0)
[all …]
/external/llvm-project/llvm/test/MC/RISCV/
Delf-header.s2 # RUN: | FileCheck -check-prefix=RV32 %s
6 # RV32: Format: elf32-littleriscv
7 # RV32: Arch: riscv32
8 # RV32: AddressSize: 32bit
9 # RV32: ElfHeader {
10 # RV32: Ident {
11 # RV32: Magic: (7F 45 4C 46)
12 # RV32: Class: 32-bit (0x1)
13 # RV32: DataEncoding: LittleEndian (0x1)
14 # RV32: FileVersion: 1
[all …]
Dmachine-csr-names-invalid.s2 # RUN: | FileCheck -check-prefixes=CHECK-NEED-RV32 %s
4 # These machine mode CSR register names are RV32 only.
6 csrrs t1, pmpcfg1, zero # CHECK-NEED-RV32: :[[@LINE]]:11: error: system register use requires an op…
7 csrrs t1, pmpcfg3, zero # CHECK-NEED-RV32: :[[@LINE]]:11: error: system register use requires an op…
9 csrrs t1, mcycleh, zero # CHECK-NEED-RV32: :[[@LINE]]:11: error: system register use requires an op…
10 csrrs t1, minstreth, zero # CHECK-NEED-RV32: :[[@LINE]]:11: error: system register use requires an …
12 csrrs t1, mhpmcounter3h, zero # CHECK-NEED-RV32: :[[@LINE]]:11: error: system register use requires…
13 csrrs t1, mhpmcounter4h, zero # CHECK-NEED-RV32: :[[@LINE]]:11: error: system register use requires…
14 csrrs t1, mhpmcounter5h, zero # CHECK-NEED-RV32: :[[@LINE]]:11: error: system register use requires…
15 csrrs t1, mhpmcounter6h, zero # CHECK-NEED-RV32: :[[@LINE]]:11: error: system register use requires…
[all …]
Duser-csr-names-invalid.s2 # RUN: | FileCheck -check-prefixes=CHECK-NEED-RV32 %s
4 # These user mode CSR register names are RV32 only.
6 csrrs t1, cycleh, zero # CHECK-NEED-RV32: :[[@LINE]]:11: error: system register use requires an opt…
7 csrrs t1, timeh, zero # CHECK-NEED-RV32: :[[@LINE]]:11: error: system register use requires an opti…
8 csrrs t1, instreth, zero # CHECK-NEED-RV32: :[[@LINE]]:11: error: system register use requires an o…
10 csrrs t1, hpmcounter3h, zero # CHECK-NEED-RV32: :[[@LINE]]:11: error: system register use requires …
11 csrrs t1, hpmcounter4h, zero # CHECK-NEED-RV32: :[[@LINE]]:11: error: system register use requires …
12 csrrs t1, hpmcounter5h, zero # CHECK-NEED-RV32: :[[@LINE]]:11: error: system register use requires …
13 csrrs t1, hpmcounter6h, zero # CHECK-NEED-RV32: :[[@LINE]]:11: error: system register use requires …
14 csrrs t1, hpmcounter7h, zero # CHECK-NEED-RV32: :[[@LINE]]:11: error: system register use requires …
[all …]
Drv64a-valid.s8 # RUN: | FileCheck -check-prefix=CHECK-RV32 %s
12 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
16 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
20 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
24 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
29 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
33 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
37 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
41 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
46 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
[all …]
Drv64d-valid.s8 # RUN: | FileCheck -check-prefix=CHECK-RV32 %s
12 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
16 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
20 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
24 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
28 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
32 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
38 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
42 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
46 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
[all …]
Drv64f-valid.s8 # RUN: | FileCheck -check-prefix=CHECK-RV32 %s
12 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
16 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
20 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
24 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
29 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
32 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
35 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
38 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
Drv64zfh-valid.s8 # RUN: | FileCheck -check-prefix=CHECK-RV32 %s
12 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
16 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
20 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
24 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
29 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
32 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
35 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
38 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
Drvi-pseudos.s2 # RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-NOPIC,CHECK-RV32
6 # RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-PIC,CHECK-RV32,CHECK-PIC-RV32
45 # CHECK-PIC-RV32: lw a0, %pcrel_lo(.Lpcrel_hi6)(a0)
53 # CHECK-PIC-RV32: lw a1, %pcrel_lo(.Lpcrel_hi7)(a1)
62 # CHECK-PIC-RV32: lw a2, %pcrel_lo(.Lpcrel_hi8)(a2)
70 # CHECK-PIC-RV32: lw a3, %pcrel_lo(.Lpcrel_hi9)(a3)
78 # CHECK-PIC-RV32: lw a4, %pcrel_lo(.Lpcrel_hi10)(a4)
84 # CHECK-RV32: lw a0, %pcrel_lo(.Lpcrel_hi11)(a0)
90 # CHECK-RV32: lw a1, %pcrel_lo(.Lpcrel_hi12)(a1)
97 # CHECK-RV32: lw a2, %pcrel_lo(.Lpcrel_hi13)(a2)
[all …]

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