| /external/clang/lib/Basic/ |
| D | TargetInfo.cpp | 374 const GCCRegAlias *Aliases; in isValidGCCRegisterName() local
377 getGCCRegAliases(Aliases, NumAliases); in isValidGCCRegisterName()
379 for (unsigned j = 0 ; j < llvm::array_lengthof(Aliases[i].Aliases); j++) { in isValidGCCRegisterName()
380 if (!Aliases[i].Aliases[j]) in isValidGCCRegisterName()
382 if (Aliases[i].Aliases[j] == Name) in isValidGCCRegisterName()
427 const GCCRegAlias *Aliases; in getNormalizedGCCRegisterName() local
430 getGCCRegAliases(Aliases, NumAliases); in getNormalizedGCCRegisterName()
432 for (unsigned j = 0 ; j < llvm::array_lengthof(Aliases[i].Aliases); j++) { in getNormalizedGCCRegisterName()
433 if (!Aliases[i].Aliases[j]) in getNormalizedGCCRegisterName()
435 if (Aliases[i].Aliases[j] == Name) in getNormalizedGCCRegisterName()
[all …]
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| D | Targets.cpp | 867 void getGCCRegAliases(const GCCRegAlias *&Aliases,
1383 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases, in getGCCRegAliases() argument
1385 Aliases = GCCRegAliases; in getGCCRegAliases()
1572 void getGCCRegAliases(const GCCRegAlias *&Aliases, in getGCCRegAliases() argument
1575 Aliases = nullptr; in getGCCRegAliases()
1734 void getGCCRegAliases(const GCCRegAlias *&Aliases, in getGCCRegAliases() argument
1736 Aliases = nullptr; in getGCCRegAliases()
2162 void getGCCRegAliases(const GCCRegAlias *&Aliases, in getGCCRegAliases() argument
2164 Aliases = nullptr; in getGCCRegAliases()
4486 void getGCCRegAliases(const GCCRegAlias *&Aliases,
[all …]
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| /external/llvm/test/Verifier/ |
| D | alias.ll | 17 ; CHECK: Aliases cannot form a cycle
19 ; CHECK-NEXT: Aliases cannot form a cycle
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| /external/llvm/lib/Analysis/ |
| D | TypeBasedAliasAnalysis.cpp | 298 bool Aliases(const MDNode *A, const MDNode *B) const;
346 TypeBasedAliasAnalysis::Aliases(const MDNode *A, in Aliases() function in TypeBasedAliasAnalysis
469 if (Aliases(AM, BM)) in alias()
525 if (!Aliases(L, M)) in getModRefInfo()
541 if (!Aliases(M1, M2)) in getModRefInfo()
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| /external/llvm/test/Assembler/ |
| D | alias-use-list-order.ll | 8 ; Aliases.
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| /external/llvm/test/Linker/Inputs/ |
| D | visibility.ll | 9 ; Aliases
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| /external/llvm/test/Analysis/BasicAA/ |
| D | 2003-02-26-AccessSizeTest.ll | 15 store i8 1, i8* %C ; Aliases %A
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| /external/vixl/src/vixl/a64/ |
| D | macro-assembler-a64.h | 1433 VIXL_ASSERT(!rt.Aliases(rt2)); in Ldaxp()
1514 VIXL_ASSERT(!rt.Aliases(rt2)); in Ldxp()
1799 VIXL_ASSERT(!rs.Aliases(dst.base())); in Stlxp()
1800 VIXL_ASSERT(!rs.Aliases(rt)); in Stlxp()
1801 VIXL_ASSERT(!rs.Aliases(rt2)); in Stlxp()
1807 VIXL_ASSERT(!rs.Aliases(dst.base())); in Stlxr()
1808 VIXL_ASSERT(!rs.Aliases(rt)); in Stlxr()
1814 VIXL_ASSERT(!rs.Aliases(dst.base())); in Stlxrb()
1815 VIXL_ASSERT(!rs.Aliases(rt)); in Stlxrb()
1821 VIXL_ASSERT(!rs.Aliases(dst.base())); in Stlxrh()
[all …]
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| D | macro-assembler-a64.cc | 2096 if (args[i].Aliases(pcs[i])) continue; in PrintfNoPreserve()
2206 VIXL_ASSERT(!sp.Aliases(arg0)); in Printf()
2207 VIXL_ASSERT(!sp.Aliases(arg1)); in Printf()
2208 VIXL_ASSERT(!sp.Aliases(arg2)); in Printf()
2209 VIXL_ASSERT(!sp.Aliases(arg3)); in Printf()
2232 bool arg0_sp = StackPointer().Aliases(arg0); in Printf()
2233 bool arg1_sp = StackPointer().Aliases(arg1); in Printf()
2234 bool arg2_sp = StackPointer().Aliases(arg2); in Printf()
2235 bool arg3_sp = StackPointer().Aliases(arg3); in Printf()
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| /external/llvm/test/Linker/ |
| D | visibility.ll | 23 ; Aliases
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| /external/llvm/utils/TableGen/ |
| D | CodeGenSchedule.h | 56 RecVec Aliases; member
87 assert((!IsAlias || Aliases.empty()) && "Alias cannot have aliases"); in isValid()
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| D | CodeGenSchedule.cpp | 307 RW.Aliases.push_back(*AI); in collectSchedRW()
429 for (RecIter AI = SchedWrite.Aliases.begin(), AE = SchedWrite.Aliases.end(); in expandRWSeqForProc()
999 for (RecIter I = RW.Aliases.begin(), E = RW.Aliases.end(); I != E; ++I) { in hasAliasedVariants()
1069 for (RecIter AI = SchedRW.Aliases.begin(), AE = SchedRW.Aliases.end(); in getIntersectingVariants()
1574 for (RecIter AI = SchedRW.Aliases.begin(), AE = SchedRW.Aliases.end(); in collectRWResources()
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| D | AsmMatcherEmitter.cpp | 2319 std::vector<Record*> &Aliases, in emitMnemonicAliasVariant() argument
2326 for (unsigned i = 0, e = Aliases.size(); i != e; ++i) { in emitMnemonicAliasVariant()
2327 Record *R = Aliases[i]; in emitMnemonicAliasVariant()
2399 std::vector<Record*> Aliases = in emitMnemonicAliases() local
2401 if (Aliases.empty()) return false; in emitMnemonicAliases()
2412 emitMnemonicAliasVariant(OS, Info, Aliases, /*Indent=*/2, in emitMnemonicAliases()
2419 emitMnemonicAliasVariant(OS, Info, Aliases); in emitMnemonicAliases()
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| D | SubtargetEmitter.cpp | 668 for (RecIter AI = SchedWrite.Aliases.begin(), AE = SchedWrite.Aliases.end(); in FindWriteResources()
722 for (RecIter AI = SchedRead.Aliases.begin(), AE = SchedRead.Aliases.end(); in FindReadAdvance()
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| D | AsmWriterEmitter.cpp | 824 for (auto &Aliases : AliasMap) { in EmitPrintAliasInstruction() local
825 for (auto &Alias : Aliases.second) { in EmitPrintAliasInstruction()
943 IAPrinterMap[Aliases.first].push_back(IAP); in EmitPrintAliasInstruction()
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| /external/clang/include/clang/Basic/ |
| D | TargetInfo.h | 662 const char * const Aliases[5]; member
880 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonRegisterInfo.td | 19 let Aliases = alias;
89 // Aliases of the R* registers used to hold 64-bit int values (doubles).
|
| /external/icu/icu4c/source/tools/tzcode/ |
| D | icuzones | 39 #### Aliases that conflict with Olson compatibility Zone definition
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| /external/llvm/lib/Target/Sparc/ |
| D | SparcRegisterInfo.td | 128 // Aliases of the F* registers used to hold 64-bit fp values (doubles)
165 // Aliases of the F* registers used to hold 128-bit for values (long doubles).
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| /external/llvm/test/Bitcode/ |
| D | highLevelStructure.3.2.ll | 19 ; Aliases Test
|
| /external/lldb/utils/vim-lldb/doc/ |
| D | lldb.txt | 96 :Lprint <expr> Aliases to the lldb print and po commands. Cursor
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| /external/v8/src/arm64/ |
| D | macro-assembler-arm64.cc | 5036 if (args[i].Aliases(pcs[i])) continue; in PrintfNoPreserve()
5138 DCHECK(!csp.Aliases(arg0)); in Printf()
5139 DCHECK(!csp.Aliases(arg1)); in Printf()
5140 DCHECK(!csp.Aliases(arg2)); in Printf()
5141 DCHECK(!csp.Aliases(arg3)); in Printf()
5169 bool arg0_sp = StackPointer().Aliases(arg0); in Printf()
5170 bool arg1_sp = StackPointer().Aliases(arg1); in Printf()
5171 bool arg2_sp = StackPointer().Aliases(arg2); in Printf()
5172 bool arg3_sp = StackPointer().Aliases(arg3); in Printf()
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| D | assembler-arm64-inl.h | 118 return Aliases(other) && (reg_size == other.reg_size); in Is()
122 inline bool CPURegister::Aliases(const CPURegister& other) const { in Aliases() function
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| /external/llvm/lib/Target/ARM/ |
| D | ARMRegisterInfo.td | 98 // Aliases of the F* registers used to hold 64-bit fp values (doubles)
169 let Aliases = [FPSCR];
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| /external/llvm/lib/Target/Mips/ |
| D | Mips64r6InstrInfo.td | 110 // Instruction Aliases
|