| /external/llvm/include/llvm/CodeGen/ |
| D | FastISel.h | 337 bool Op0IsKill);
342 bool Op0IsKill, unsigned Op1, bool Op1IsKill);
348 bool Op0IsKill, uint64_t Imm);
354 bool Op0IsKill, const ConstantFP *FPImm);
360 unsigned Op0, bool Op0IsKill, unsigned Op1,
368 unsigned fastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill,
390 bool Op0IsKill);
396 bool Op0IsKill, unsigned Op1, bool Op1IsKill);
402 bool Op0IsKill, unsigned Op1, bool Op1IsKill,
409 bool Op0IsKill, uint64_t Imm);
[all …]
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | FastISel.cpp | 424 bool Op0IsKill = hasTrivialKill(I->getOperand(0)); in selectBinaryOp() local
445 Op0IsKill, Imm, VT.getSimpleVT()); in selectBinaryOp()
457 ISDOpcode, Op0, Op0IsKill, CF); in selectBinaryOp()
472 ISDOpcode, Op0, Op0IsKill, Op1, Op1IsKill); in selectBinaryOp()
1282 bool Op0IsKill = hasTrivialKill(I->getOperand(0)); in selectBitCast() local
1299 ResultReg = fastEmit_r(SrcVT, DstVT, ISD::BITCAST, Op0, Op0IsKill); in selectBitCast()
1654 bool Op0IsKill, uint64_t Imm, MVT ImmType) { in fastEmit_ri_() argument
1672 unsigned ResultReg = fastEmit_ri(VT, VT, Opcode, Op0, Op0IsKill, Imm); in fastEmit_ri_()
1685 return fastEmit_rr(VT, VT, Opcode, Op0, Op0IsKill, MaterialReg, in fastEmit_ri_()
1721 bool Op0IsKill) { in fastEmitInst_r() argument
[all …]
|
| /external/llvm/lib/Target/AArch64/ |
| D | AArch64FastISel.cpp | 193 unsigned emitAdd_ri_(MVT VT, unsigned Op0, bool Op0IsKill, int64_t Imm);
211 unsigned emitMul_rr(MVT RetVT, unsigned Op0, bool Op0IsKill,
213 unsigned emitSMULL_rr(MVT RetVT, unsigned Op0, bool Op0IsKill,
215 unsigned emitUMULL_rr(MVT RetVT, unsigned Op0, bool Op0IsKill,
217 unsigned emitLSL_rr(MVT RetVT, unsigned Op0Reg, bool Op0IsKill,
219 unsigned emitLSL_ri(MVT RetVT, MVT SrcVT, unsigned Op0Reg, bool Op0IsKill,
221 unsigned emitLSR_rr(MVT RetVT, unsigned Op0Reg, bool Op0IsKill,
223 unsigned emitLSR_ri(MVT RetVT, MVT SrcVT, unsigned Op0Reg, bool Op0IsKill,
225 unsigned emitASR_rr(MVT RetVT, unsigned Op0Reg, bool Op0IsKill,
227 unsigned emitASR_ri(MVT RetVT, MVT SrcVT, unsigned Op0Reg, bool Op0IsKill,
[all …]
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMFastISel.cpp | 110 unsigned Op0, bool Op0IsKill);
113 unsigned Op0, bool Op0IsKill,
117 unsigned Op0, bool Op0IsKill,
122 unsigned Op0, bool Op0IsKill,
126 unsigned Op0, bool Op0IsKill,
288 unsigned Op0, bool Op0IsKill) { in fastEmitInst_r() argument
297 ResultReg).addReg(Op0, Op0IsKill * RegState::Kill)); in fastEmitInst_r()
300 .addReg(Op0, Op0IsKill * RegState::Kill)); in fastEmitInst_r()
310 unsigned Op0, bool Op0IsKill, in fastEmitInst_rr() argument
323 .addReg(Op0, Op0IsKill * RegState::Kill) in fastEmitInst_rr()
[all …]
|
| /external/llvm/lib/Target/PowerPC/ |
| D | PPCFastISel.cpp | 116 unsigned Op0, bool Op0IsKill,
120 unsigned Op0, bool Op0IsKill);
123 unsigned Op0, bool Op0IsKill,
2275 unsigned Op0, bool Op0IsKill, in fastEmitInst_ri() argument
2287 Op0, Op0IsKill, Imm); in fastEmitInst_ri()
2295 unsigned Op0, bool Op0IsKill) { in fastEmitInst_r() argument
2300 return FastISel::fastEmitInst_r(MachineInstOpcode, UseRC, Op0, Op0IsKill); in fastEmitInst_r()
2308 unsigned Op0, bool Op0IsKill, in fastEmitInst_rr() argument
2314 return FastISel::fastEmitInst_rr(MachineInstOpcode, UseRC, Op0, Op0IsKill, in fastEmitInst_rr()
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 161 unsigned Op0, bool Op0IsKill, uint64_t imm1, in fastEmitInst_riir() argument
|