Home
last modified time | relevance | path

Searched refs:r3 (Results 1 – 25 of 2535) sorted by relevance

12345678910>>...102

/external/linux-kselftest/tools/testing/selftests/powerpc/pmu/ebb/
Debb_handler.S143 SAVE_VSR(0, r3)
148 SAVE_VSR(1, r3)
149 SAVE_VSR(2, r3)
150 SAVE_VSR(3, r3)
151 SAVE_VSR(4, r3)
152 SAVE_VSR(5, r3)
153 SAVE_VSR(6, r3)
154 SAVE_VSR(7, r3)
155 SAVE_VSR(8, r3)
156 SAVE_VSR(9, r3)
[all …]
/external/u-boot/arch/powerpc/cpu/mpc86xx/
Dcache.S36 mfspr r3,HID0
37 ori r3,r3,HID0_ICFI
38 mtspr HID0,r3
46 mfspr r3,HID0
47 ori r3,r3,HID0_DCFI
48 mtspr HID0,r3
56 lis r3,0
59 cmp 0,1,r3,r5
61 lwz r5,0(r3)
63 addi r3,r3,0x4
[all …]
Dstart.S91 addi r3,r1,STACK_FRAME_OVERHEAD
98 addi r3,r1,STACK_FRAME_OVERHEAD
159 lis r3, L2_INIT@h
160 ori r3, r3, L2_INIT@l
161 mtspr l2cr, r3
170 lis r3, CONFIG_SYS_MONITOR_BASE_EARLY@h
171 ori r3, r3, CONFIG_SYS_MONITOR_BASE_EARLY@l
172 addi r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
173 mtlr r3
199 lis r3,addr_trans_enabled@h
[all …]
Drelease.S67 addis r3, r0, L2_INIT@h
68 ori r3, r3, L2_INIT@l
70 mtspr l2cr, r3
75 mfspr r3, l2cr
76 rlwinm. r3, r3, 0, 0, 0
79 mfspr r3, l2cr
80 rlwinm r3, r3, 0, 1, 31
86 mtspr l2cr, r3
88 1: mfspr r3, l2cr
89 oris r3, r3, L2CR_L2I@h
[all …]
/external/u-boot/arch/powerpc/cpu/mpc85xx/
Drelease.S32 mfspr r3, SPRN_HDBCR0
33 oris r3, r3, 0x0080
34 mtspr SPRN_HDBCR0, r3
37 lis r3, HID0_EMCP@h /* enable machine check */
39 ori r3,r3,HID0_TBEN@l /* enable Timebase */
42 ori r3,r3,HID0_ENMAS7@l /* enable MAS7 updates */
44 mtspr SPRN_HID0,r3
47 li r3,(HID1_ASTME|HID1_ABE)@l /* Addr streaming & broadcast */
53 ori r3, r3, HID1_MBDD@l
55 mtspr SPRN_HID1,r3
[all …]
Dstart.S87 mr r24, r3
90 mfspr r3,SPRN_SVR
91 rlwinm r3,r3,0,0xff
93 cmpw r3,r4
98 cmpw r3,r4
110 mfspr r3,SPRN_HDBCR0
112 rlwimi r3,r4,0,0x1f8
113 mtspr SPRN_HDBCR0,r3
120 mfspr r3, SPRN_HDBCR0
121 oris r3, r3, 0x0080
[all …]
/external/compiler-rt/lib/tsan/rtl/
Dtsan_rtl_ppc64.S21 std r3,32(r1)
24 addi r3,r1,48
27 xor r4,r3,r4
47 ld r3,32(r1)
57 std r5,0(r3) // mangled stack ptr of caller
59 std r5,8(r3) // caller's saved TOC pointer
61 std r0,16(r3) // caller's mangled return address
64 std r14,24(r3)
65 stfd f14,176(r3)
66 stw r0,172(r3) // CR
[all …]
/external/u-boot/arch/powerpc/cpu/mpc83xx/
Dstart.S110 mfmsr r3
111 andi. r0, r3, (MSR_IR | MSR_DR)
113 andc r3, r3, r0
115 mtspr SRR1, r3
121 stfd 1, 0(r3)
126 lfd 1, 0(r3)
173 lis r3, CONFIG_SYS_IMMR@h
174 ori r3, r3, CONFIG_SYS_IMMR@l
179 stw r3, IMMRBAR(r4)
183 lwz r6, IMMRBAR(r3)
[all …]
/external/libffi/src/arm/
Dtrampoline.S34 stmfd sp!, {r0-r3}
47 stmfd sp!, {r0-r3}
60 stmfd sp!, {r0-r3}
73 stmfd sp!, {r0-r3}
86 stmfd sp!, {r0-r3}
99 stmfd sp!, {r0-r3}
112 stmfd sp!, {r0-r3}
125 stmfd sp!, {r0-r3}
138 stmfd sp!, {r0-r3}
151 stmfd sp!, {r0-r3}
[all …]
/external/python/cpython2/Modules/_ctypes/libffi/src/arm/
Dtrampoline.S34 stmfd sp!, {r0-r3}
47 stmfd sp!, {r0-r3}
60 stmfd sp!, {r0-r3}
73 stmfd sp!, {r0-r3}
86 stmfd sp!, {r0-r3}
99 stmfd sp!, {r0-r3}
112 stmfd sp!, {r0-r3}
125 stmfd sp!, {r0-r3}
138 stmfd sp!, {r0-r3}
151 stmfd sp!, {r0-r3}
[all …]
/external/u-boot/examples/standalone/
Dppc_longjmp.S23 lwz r1,(JB_GPR1*4)(r3)
24 lwz r2,(JB_GPR2*4)(r3)
25 lwz r0,(JB_LR*4)(r3)
26 lwz r14,((JB_GPRS+0)*4)(r3)
27 FP( lfd 14,((JB_FPRS+0*2)*4)(r3))
28 lwz r15,((JB_GPRS+1)*4)(r3)
29 FP( lfd 15,((JB_FPRS+1*2)*4)(r3))
30 lwz r16,((JB_GPRS+2)*4)(r3)
31 FP( lfd 16,((JB_FPRS+2*2)*4)(r3))
32 lwz r17,((JB_GPRS+3)*4)(r3)
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/CodeGen/PowerPC/
DtestComparesiness.ll13 ; CHECK: xor r3, r3, r4
14 ; CHECK-NEXT: cntlzw r3, r3
15 ; CHECK-NEXT: srwi r3, r3, 5
16 ; CHECK-NEXT: xori r3, r3, 1
26 ; CHECK: xor r3, r3, r4
27 ; CHECK-NEXT: cntlzw r3, r3
28 ; CHECK-NEXT: srwi r3, r3, 5
29 ; CHECK-NEXT: xori r3, r3, 1
30 ; CHECK-NEXT: neg r3, r3
40 ; CHECK: cntlzw r3, r3
[all …]
DtestComparesinesc.ll13 ; CHECK: xor r3, r3, r4
14 ; CHECK-NEXT: cntlzw r3, r3
15 ; CHECK-NEXT: srwi r3, r3, 5
16 ; CHECK-NEXT: xori r3, r3, 1
26 ; CHECK: xor r3, r3, r4
27 ; CHECK-NEXT: cntlzw r3, r3
28 ; CHECK-NEXT: srwi r3, r3, 5
29 ; CHECK-NEXT: xori r3, r3, 1
30 ; CHECK-NEXT: neg r3, r3
40 ; CHECK: cntlzw r3, r3
[all …]
DtestComparesineui.ll13 ; CHECK: xor r3, r3, r4
14 ; CHECK-NEXT: cntlzw r3, r3
15 ; CHECK-NEXT: srwi r3, r3, 5
16 ; CHECK-NEXT: xori r3, r3, 1
26 ; CHECK: xor r3, r3, r4
27 ; CHECK-NEXT: cntlzw r3, r3
28 ; CHECK-NEXT: srwi r3, r3, 5
29 ; CHECK-NEXT: xori r3, r3, 1
30 ; CHECK-NEXT: neg r3, r3
40 ; CHECK: cntlzw r3, r3
[all …]
DtestComparesinesi.ll13 ; CHECK: xor r3, r3, r4
14 ; CHECK-NEXT: cntlzw r3, r3
15 ; CHECK-NEXT: srwi r3, r3, 5
16 ; CHECK-NEXT: xori r3, r3, 1
26 ; CHECK: xor r3, r3, r4
27 ; CHECK-NEXT: cntlzw r3, r3
28 ; CHECK-NEXT: srwi r3, r3, 5
29 ; CHECK-NEXT: xori r3, r3, 1
30 ; CHECK-NEXT: neg r3, r3
40 ; CHECK: cntlzw r3, r3
[all …]
DtestComparesineuc.ll13 ; CHECK-NEXT: xor r3, r3, r4
14 ; CHECK-NEXT: cntlzw r3, r3
15 ; CHECK-NEXT: srwi r3, r3, 5
16 ; CHECK-NEXT: xori r3, r3, 1
27 ; CHECK-NEXT: xor r3, r3, r4
28 ; CHECK-NEXT: cntlzw r3, r3
29 ; CHECK-NEXT: srwi r3, r3, 5
30 ; CHECK-NEXT: xori r3, r3, 1
31 ; CHECK-NEXT: neg r3, r3
42 ; CHECK-NEXT: cntlzw r3, r3
[all …]
DtestComparesineus.ll14 ; CHECK-NEXT: xor r3, r3, r4
15 ; CHECK-NEXT: cntlzw r3, r3
16 ; CHECK-NEXT: srwi r3, r3, 5
17 ; CHECK-NEXT: xori r3, r3, 1
28 ; CHECK-NEXT: xor r3, r3, r4
29 ; CHECK-NEXT: cntlzw r3, r3
30 ; CHECK-NEXT: srwi r3, r3, 5
31 ; CHECK-NEXT: xori r3, r3, 1
32 ; CHECK-NEXT: neg r3, r3
43 ; CHECK-NEXT: cntlzw r3, r3
[all …]
/external/u-boot/board/freescale/mx35pdk/
Dlowlevel_init.S59 ldrhs r3, =CCM_MPLL_532_HZ
63 ldrne r3, =CCM_MPLL_532_HZ /* consumer path*/
64 ldreq r3, =CCM_MPLL_399_HZ /* auto path*/
66 str r3, [r0, #CLKCTL_MPCTL]
91 mov r3, #0x2000
92 str r3, [r0, #0x0]
93 str r3, [r0, #0x8]
111 ldr r3, =ESDCTL_DELAY_LINE5
112 str r3, [r0, #0x30]
149 mov r3, #0xE
[all …]
/external/libxaac/decoder/armv7/
Dixheaacd_mps_complex_fft_64_asm.s57 STMIA r3!, {r4-r11}
64 SUB r3, r3, r0, LSL #3
66 STR r3, [sp, #0x50]
131 LDR r3, [sp, #0x50]
133 ADD r12, r3, #8
135 MOV r3, r1, ASR #2
136 ADD r3, r3, r1, ASR #3
137 SUB r3, r3, r1, ASR #4
138 ADD r3, r3, r1, ASR #5
139 SUB r3, r3, r1, ASR #6
[all …]
Dixheaacd_complex_fft_p2.s72 STMIA r3!, {r4-r11}
79 SUB r3, r3, r0, LSL #3
81 STR r3, [sp, #0x50]
146 LDR r3, [sp, #0x50]
148 ADD r12, r3, #8
150 MOV r3, r1, ASR #2
151 ADD r3, r3, r1, ASR #3
152 SUB r3, r3, r1, ASR #4
153 ADD r3, r3, r1, ASR #5
154 SUB r3, r3, r1, ASR #6
[all …]
Dixheaacd_complex_ifft_p2.s72 STMIA r3!, {r4-r11}
79 SUB r3, r3, r0, LSL #3
81 STR r3, [sp, #0x50]
146 LDR r3, [sp, #0x50]
148 ADD r12, r3, #8
150 MOV r3, r1, ASR #2
151 ADD r3, r3, r1, ASR #3
152 SUB r3, r3, r1, ASR #4
153 ADD r3, r3, r1, ASR #5
154 SUB r3, r3, r1, ASR #6
[all …]
/external/capstone/suite/MC/ARM/
Dbasic-thumb-instructions.s.cs6 0xd1,0x18 = adds r1, r2, r3
15 0x9d,0x44 = add sp, r3
19 0xff,0xa3 = adr r3, #1020
20 0x1a,0x10 = asrs r2, r3, #32
21 0x5a,0x11 = asrs r2, r3, #5
22 0x5a,0x10 = asrs r2, r3, #1
25 0x6b,0x15 = asrs r3, r5, #21
40 0xa3,0x42 = cmp r3, r4
45 0xff,0xcb = ldm r3, {r0, r1, r2, r3, r4, r5, r6, r7}
46 0xba,0xca = ldm r2!, {r1, r3, r4, r5, r7}
[all …]
/external/vixl/test/aarch32/
Dtest-assembler-cond-rd-rn-operand-rm-all-low-in-it-block-t32.cc98 {{gt, r3, r1, r0}, true, gt, "gt r3 r1 r0", "gt_r3_r1_r0"},
99 {{ls, r4, r3, r6}, true, ls, "ls r4 r3 r6", "ls_r4_r3_r6"},
100 {{pl, r5, r3, r4}, true, pl, "pl r5 r3 r4", "pl_r5_r3_r4"},
102 {{ls, r1, r2, r3}, true, ls, "ls r1 r2 r3", "ls_r1_r2_r3"},
103 {{vc, r4, r3, r4}, true, vc, "vc r4 r3 r4", "vc_r4_r3_r4"},
105 {{ls, r3, r4, r0}, true, ls, "ls r3 r4 r0", "ls_r3_r4_r0"},
106 {{gt, r6, r4, r3}, true, gt, "gt r6 r4 r3", "gt_r6_r4_r3"},
113 {{lt, r4, r3, r3}, true, lt, "lt r4 r3 r3", "lt_r4_r3_r3"},
115 {{ls, r3, r3, r1}, true, ls, "ls r3 r3 r1", "ls_r3_r3_r1"},
118 {{eq, r4, r3, r0}, true, eq, "eq r4 r3 r0", "eq_r4_r3_r0"},
[all …]
Dtest-assembler-cond-rdlow-rnlow-rmlow-in-it-block-t32.cc98 {{eq, r0, r3, r0}, true, eq, "eq r0 r3 r0", "eq_r0_r3_r0"},
106 {{eq, r1, r3, r1}, true, eq, "eq r1 r3 r1", "eq_r1_r3_r1"},
114 {{eq, r2, r3, r2}, true, eq, "eq r2 r3 r2", "eq_r2_r3_r2"},
119 {{eq, r3, r0, r3}, true, eq, "eq r3 r0 r3", "eq_r3_r0_r3"},
120 {{eq, r3, r1, r3}, true, eq, "eq r3 r1 r3", "eq_r3_r1_r3"},
121 {{eq, r3, r2, r3}, true, eq, "eq r3 r2 r3", "eq_r3_r2_r3"},
122 {{eq, r3, r3, r3}, true, eq, "eq r3 r3 r3", "eq_r3_r3_r3"},
123 {{eq, r3, r4, r3}, true, eq, "eq r3 r4 r3", "eq_r3_r4_r3"},
124 {{eq, r3, r5, r3}, true, eq, "eq r3 r5 r3", "eq_r3_r5_r3"},
125 {{eq, r3, r6, r3}, true, eq, "eq r3 r6 r3", "eq_r3_r6_r3"},
[all …]
/external/swiftshader/third_party/LLVM/test/MC/ARM/
Darm-arithmetic-aliases.s8 sub r2, r2, r3
9 sub r2, r3
13 @ CHECK: sub r2, r2, r3 @ encoding: [0x03,0x20,0x42,0xe0]
14 @ CHECK: sub r2, r2, r3 @ encoding: [0x03,0x20,0x42,0xe0]
18 add r2, r2, r3
19 add r2, r3
23 @ CHECK: add r2, r2, r3 @ encoding: [0x03,0x20,0x82,0xe0]
24 @ CHECK: add r2, r2, r3 @ encoding: [0x03,0x20,0x82,0xe0]
28 and r2, r2, r3
29 and r2, r3
[all …]

12345678910>>...102